An FPGA-based memristor emulator for artificial neural network

Zhang, Zhang; Li, Chao; Zhang, Weiqi; Zhou, Jing; Liu, Gang

doi:10.1016/j.mejo.2022.105639

Cited by 12 publications

(6 citation statements)

References 20 publications

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“…Since the concept of memristor was put forward by Professor Chua [7] in 1971 to the successful development of physical memristor by HP Labs [8] in 2008, memristor has been put into use in many areas like chaotic circuit [9][10][11][12], image processing [13][14][15][16][17], neural network [18][19][20][21][22][23] and non-volatile memory [24][25][26][27], etc And its bionic function provides a new idea for the study of neurodynamics. The use of memristor to describe the effect of electromagnetic induction on neuronal system can reveal the firing pattern transition and bifurcating mechanism of neuronal system under electromagnetic action [28][29][30][31].…”

Section: Introductionmentioning

confidence: 99%

Coexisting firing patterns and circuit design of locally active memristive autapse morris-lecar neuron

Li,

Yang,

Sun

et al. 2023

Phys. Scr.

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A novel bistable locally active memristor is proposed in this paper. A locally active memristive autapse Morris-Lecar neuron model is constructed by using memristor to simulate the autapse of neuron. The equilibrium point and stability of the system are analyzed, and the firing mode and bifurcation characteristics of the neuronal system are revealed by using dynamic analysis methods such as slow-fastdynamics, interspike interval bifurcation diagrams, Lyapunov exponents, phase diagrams and time series diagram. By changing the memristive autapse gain and the initial state of the system, the existence of coexisting firing patterns in the constructed neuron model is confirmed. Finally, to further verify the effectiveness of the numerical simulation, the analog equivalent circuit of the locally active memristive neuron system is designed, which proves that the system is physically realizable.

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Section: Introductionmentioning

confidence: 99%

Coexisting firing patterns and circuit design of locally active memristive autapse morris-lecar neuron

Li,

Yang,

Sun

et al. 2023

Phys. Scr.

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“…17,18 Hardware flexibility, reconfigurability, ease of programming, and control are their advantages. 19 However, their operating frequency is generally limited by their clock frequency. 8 A proven approach to reducing the occupied chip area of a memristor emulator is to reduce or even eliminate the active and passive components in the memristor emulator.…”

Section: Introductionmentioning

confidence: 99%

“…The other type of memristor emulator is the digital memristor emulator based on FPGAs or ASICs 17,18 . Hardware flexibility, reconfigurability, ease of programming, and control are their advantages 19 . However, their operating frequency is generally limited by their clock frequency 8 …”

Section: Introductionmentioning

confidence: 99%

A GHz‐level memristor emulator with only MOSFET

Zhou,

Wang,

Chen

2023

Circuit Theory & Apps

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SummaryThe MOS‐only memristor only uses the transistor's intrinsic capacitance to realize the memristor's memory effect, which is beneficial to increase its operating frequency and reduce its occupied chip area. This paper proposes a GHz‐level MOS‐only memristor emulator (i.e., PGME and NGME). PGME/NGME consists of three/four MOSFETs without any external elements and power supplies. The operating frequency of PGME/NGME is high up to 5 GHz. When the three/four MOSFETs in PGME are pch_hvts of TSMC's 65‐nm process, the occupied chip areas of PGME‐3, PGME‐4A, and PGME‐4B are 3.9 ∗ 2.7 m2, 4.3 ∗ 3.3 m2, and 4.3 ∗ 4.4 m2, respectively. The minimum step time of material implication circuit based on PGME‐3 and NGME‐3 is only 70 ps. Additionally, a chaotic oscillator circuit based on PGME‐4A is presented and verified with discrete p‐channel MOSFETs of CD4007.

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“…Consequently, digital emulators also attract many researchers due to their small area, hardware flexibility, reconfigurability, and ease of programming and control. [13][14][15][16][17][18] In Vijay Ramakrishnan, 14 a double-gated memristor model is presented, and its applications in analog, digital, and neuromorphic circuits are discussed. Camps et al 15 present a purely digital memristor emulator based on a flux-charge model and implemented in a commercial FPGA.…”

Section: Introductionmentioning

confidence: 99%

“…However, the high power consumption and large area of the analog memristor emulator make it unsuitable for large‐scale memristor integration scenarios. Consequently, digital emulators also attract many researchers due to their small area, hardware flexibility, reconfigurability, and ease of programming and control 13–18 . In Vijay Ramakrishnan, 14 a double‐gated memristor model is presented, and its applications in analog, digital, and neuromorphic circuits are discussed.…”

Section: Introductionmentioning

confidence: 99%

A gate‐tunable memristor emulator for motion detection

Zhang,

Ma,

Shi

et al. 2023

Circuit Theory & Apps

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SummaryWith its low power consumption and small size, the memristor has shown great potential for improving data storage density and computing efficiency. Compared to the dual‐port memristor, greater attention should be paid to researching gate‐tunable memristor for image processing to improve the processing speed and reduce hardware resource consumption. Developing gate‐tunable memristor emulators is highly attractive given the immaturity of current fabrication of the gate‐tunable memristor. This work proposes a digital gate‐tunable memristor emulator based on Raspberry Pi, which addresses the non‐reconfigurability and inflexibility issues of the analog emulators. The proposed emulator can match the behavior of different memristor devices by regulating the gate voltage parameter. Additionally, it can operate at a maximum frequency of 500 MHz. To test the functionality of the proposed emulator, a digital implementation of the memristive circuit for motion detection is designed and verified experimentally. Experiments demonstrate that when moving object detection is performed on a 640 × 350 pixel video stream, low power consumption of 53 mW and a delay of 3.52 μs can be achieved.

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An FPGA-based memristor emulator for artificial neural network

Cited by 12 publications

References 20 publications

Coexisting firing patterns and circuit design of locally active memristive autapse morris-lecar neuron

Coexisting firing patterns and circuit design of locally active memristive autapse morris-lecar neuron

A GHz‐level memristor emulator with only MOSFET

A gate‐tunable memristor emulator for motion detection

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