An FPGA-based MPSoC for real-time ECG analysis

Mimouni, El Hassan El; Karim, Mohamed Rehan; Amarouch, Mohamed Yassine

doi:10.1109/icocs.2015.7483297

Cited by 3 publications

(5 citation statements)

References 8 publications

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“…The algorithm is tested using Matlab and realized on Altera DE2-115 board that contains a cyclone IV 4CE115 FPGA chip. The results in [35] claim a high rate of successful detection that overcome the FPGAbased performance of [32] without excluding the challenging ECG signals of the same tested database.…”

Section: ) Detection and Diagnostic Implementationmentioning

confidence: 90%

“…With the aid of the previous work in [31], the research in [32] presents an FPGA-based Multiprocessor System on Chip (MPSoC) implementation in master-slave fashion to detect QRS complex of the ECG signal. The research utilizes and tests a reduced 3-processor configuration that consists of a master processor that provide the system control and two slave processors that handle the 12-lead ECG standard.…”

Section: ) Detection and Diagnostic Implementationmentioning

confidence: 99%

“…The researchers in [35] suggest an alternative approach to that of [32] which consist of a three stages algorithm inspired by [36] to detect the QRS of the ECG complex signal. The first stage of proposed algorithm performs filtering operation using high-pass and low-pass FIR filters to eliminate noise, interference as well as P and T waves from the ECG signal.…”

Section: ) Detection and Diagnostic Implementationmentioning

confidence: 99%

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Review: Recent Directions in ECG-FPGA Researches

Ibrahim

Hamad

Abed

et al. 2019

JUBES

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The last few years witnessed an increased interest in utilizing field programmable gate array (FPGA) for a variety of applications. This utilizing derived mostly by the advances in the FPGA flexible resource configuration, increased speed, relatively low cost and low energy consumption. The introduction of FPGA in medicine and health care field aim generally to replace costly and usually bigger medical monitoring and diagnostic equipment with much smaller and possibly portable systems based on FPGA that make use of the design flexibility of FPGA. Many recent researches focus on FPGA systems to deal with the well-known yet very important electrocardiogram (ECG) signal aspects to provide acceleration and improvement in the performance as well as finding and proposing new ideas for such implementations. The recent directions in ECG-FPGA are introduced in this paper.

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Section: ) Detection and Diagnostic Implementationmentioning

confidence: 90%

Section: ) Detection and Diagnostic Implementationmentioning

confidence: 99%

Section: ) Detection and Diagnostic Implementationmentioning

confidence: 99%

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Review: Recent Directions in ECG-FPGA Researches

Ibrahim

Hamad

Abed

et al. 2019

JUBES

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“…These integrated module offers modularity, flexibility, and reconfigurable feature, but lags with scalable issues on the hardware platform. Karim et al [17] present MPSOC based module for ECG applications on FPGA, which includes master and slave processor module for processing the software-based ECG data and displays the ECG data on FPGA's input-output switches.…”

Section: Related Workmentioning

confidence: 99%

Design and Analysis of Imaging Chip using High-Speed AXI-Interface for MPSOC Applications on FPGA Platform

Archana,

Reddy

2024

Wireless Pers Commun

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The recent innovations in real-time video and image enhancements are allowing much advancement in a wide range of diverse applications. These innovations and advancements provide a new hardware architecture which aims to improve the image visualization, processing speed, and complexity reduction in hardware. The imaging chip concept is introduced in this article to support the Multiprocessing system on chip (MPSoC) applications in real-time scenarios on a single chip. The imaging chip model is designed using high-speed interface protocol, which includes different image enhancement algorithms acts as a master model, Advanced Extensible Interface (AXI)-4 as an interface model, and dual-port memory as a slave model. The image enhancement algorithm includes mainly, Brightness control, contrast stretching, Adaptive median filtering (AMF), Edge-detection techniques, image Thresholding, and Image Histogram method. The AXI-4 provides a high-speed interface for communicating master and slave modules. The proposed model work based on the modes of the operation to process the enhanced image output in MPSoC. The design supports multiple masters and multiple slave modules with reconfigurable nature. The imaging chip is a module on the Xilinx ISE environment and implemented on Artix-7 FPGA, along with the performance metrics like chip Area, time, power, and memory utilization are analyzed with improvements. The model offers low latency and high throughput architecture for real-time Multimedia applications.

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“…Embedded processor as one of the crucial components in IoT adopts the same approach in the form of multi-processor system-on-chip (MPSoC) [9], a single integrated circuit containing multiple processors and other elements such as input-output (IO) and memory [10]. MPSoCs has been widely developed and used in various applications such as LTE modem [11], ECG analysis [12], image processing [13,14]. One example of a low-power MPSoC is the RUMPS401.…”

Section: Introductionmentioning

confidence: 99%

Multicore development environment for embedded processor in arduino IDE

et al. 2020

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Internet of things (IoT) technology has found more applications that require complex computation while still preserving power. Embedded processors as the core of the IoT system approaches the need for computation by employing a parallel processor system, namely MPSoC. While various MPSoCs hardware is widely available, there is limited software support form of user-friendly libraries and development platform. There is a need for such a platform to facilitate both the study and development of parallel embedded software. arduino as the widely used embedded development platform is yet to officially support multicore programming. This work proposes an arduino-based development environment that supports multicore programming while maintaining arduino's simple program structure, targeted at specific low-power MPSoC, the RUMPS401. The environment is fully functional, and while it targets only specific MPSoC, the proposed environment can easily be adopted to other MPSoCs with similar structures with minimal modification.

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An FPGA-based MPSoC for real-time ECG analysis

Cited by 3 publications

References 8 publications

Review: Recent Directions in ECG-FPGA Researches

Review: Recent Directions in ECG-FPGA Researches

Design and Analysis of Imaging Chip using High-Speed AXI-Interface for MPSOC Applications on FPGA Platform

Multicore development environment for embedded processor in arduino IDE

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