An FPGA Implementation of Real-Time Object Detection with a Thermal Camera

Shimoda, Masayuki; Sada, Youki; Kuramochi, Ryosuke; Nakahara, Hiroki

doi:10.1109/fpl.2019.00072

Cited by 13 publications

(10 citation statements)

References 4 publications

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“…Therefore, in this analysis, an FPGA with a reconfiguration is used to implement two controllers -vector power, and frequency -voltage control (f/Hz). This configuration shows that a stable and potentially noise-reduction transition between controls can be achieved Gandhare et al [2019]; Shimoda et al [2019]. The main contribution of the present work is, 1.…”

Section: Introductionmentioning

confidence: 68%

FPGA Based Dual Controller Design for EMI Reduction in Dc-Dc Converters

Britto¹,

Saravanan²,

Kumar³

et al. 2021

Proceedings of the First International Conference on Computing, Communication and Control System, I3CAC 2021, 7-8 June 2021, Bh

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In high frequency electronic power converters, the suppression of Electromagnetic Interference (EMI) and the improvement of Electromagnetic Compatibility (EMC) have become important. Field Programmable Logic Array (FPGA) has become a low-cost platform offering the ability for power electronics to create unique EMC control techniques. In FPGA, however, it is complicated to accomplish some of the features required in the power electronic control system. The key difficulties are related to the operation of the fixed point, and the need to change the dynamic number range. Constructing filters to comply with the EMI limits is a significant part of the production cost of power converters. Therefore, a simple yet powerful dual controller based FPGA is therefore discussed to provide a substantial motor control for noise reduction. A model of a prototype has been tested and hardware findings indicate a substantial drives with low performance requirements. In terms of speed and torque, the theoretical algorithms, hardware information and experimental findings are presented and discussed.

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Section: Introductionmentioning

confidence: 68%

FPGA Based Dual Controller Design for EMI Reduction in Dc-Dc Converters

Britto¹,

Saravanan²,

Kumar³

et al. 2021

Proceedings of the First International Conference on Computing, Communication and Control System, I3CAC 2021, 7-8 June 2021, Bh

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show abstract

“…On the other hand, due to being cost-efective and energy eicient, FPGA platforms are also widely used as edge computing solutions for time-critical computational intensive applications such as real-time object detection [31], autonomous driving system [22], and machine learning inference [21]. A modern embedded FPGA is typically integrated on an SoC-based platform, as illustrated in Figure 1(b), which is composed of the processing system (PS) and programmable logic (PL), both sharing a single DRAM.…”

Section: Modern Datacenter and Embedded Fpgas And Our Focusmentioning

confidence: 99%

“…In the past few years, all major cloud service providersÐsuch as Amazon Web Services [3], Microsoft Azure [25], Alibaba Cloud [1], and Nimbix [26]Ð have deployed FPGAs in their datacenters. On the other hand, embedded FPGAs, relatively cheaper in cost than datacenter FPGAs, have been extensively used to bring acceleration to computational intensive in-ield applications such as, real-time object detection [31], autonomous driving system [22], and machine learning inference [21]. As a result, hardware and software developers not only have access to FPGAs on the embedded System-on-Chip (SoC) boards but also can easily access FPGA computing platforms as a cloud service.…”

Section: Introductionmentioning

confidence: 99%

Demystifying the Soft and Hardened Memory Systems of Modern FPGAs for Software Programmers through Microbenchmarking

Fang

Shannon

2022

ACM Trans. Reconfigurable Technol. Syst.

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Both modern datacenter and embedded FPGAs provide great opportunities for high-performance and high energy-efficiency computing. With the growing public availability of FPGAs from major cloud service providers such as AWS, Alibaba, and Nimbix, as well as uniform hardware accelerator development tools (such as Xilinx Vitis and Intel oneAPI) for software programmers, hardware and software developers can now easily access FPGA platforms. However, it is nontrivial to develop efficient FPGA accelerators, especially for software programmers who use high-level synthesis (HLS). The major goal of this paper is to figure out how to efficiently access the memory system of modern datacenter and embedded FPGAs in HLS-based accelerator designs. This is especially important for memory-bound applications; for example, a naive accelerator design only utilizes less than 5% of the available off-chip memory bandwidth. To achieve our goal, we first identify a comprehensive set of factors that affect the memory bandwidth, including 1) the clock frequency of the accelerator design, 2) the number of concurrent memory access ports, 3) the data width of each port, 4) the maximum burst access length for each port, and 5) the size of consecutive data accesses. Then we carefully design a set of HLS-based microbenchmarks to quantitatively evaluate the performance of the memory systems of datacenter FPGAs (Xilinx Alveo U200 and U280) and embedded FPGA (Xilinx ZCU104) when changing those affecting factors, and provide insights into efficient memory access in HLS-based accelerator designs. Comparing between the typically used soft and hardened memory systems respectively found on datacenter and embedded FPGAs, we further summarize their unique features and discuss the effective approaches to leverage these systems. To demonstrate the usefulness of our insights, we also conduct two case studies to accelerate the widely used K-nearest neighbors (KNN) and sparse matrix-vector multiplication (SpMV) algorithms on datacenter FPGAs with a soft (and thus more flexible) memory system. Compared to the baseline designs, optimized designs leveraging our insights achieve about 3.5x and 8.5x speedups for the KNN and SpMV accelerators. Our final optimized KNN and SpMV designs on a Xilinx Alveo U200 FPGA fully utilize its off-chip memory bandwidth, and achieve about 5.6x and 3.4x speedups over the 24-core CPU implementations.

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“…The conclusions present a not so used metric showing values as low as 27% missing rate, and reveal that it might be possible to obtain acceptable results. With F1-scores of up to 93.4 and 22 frames-per-second (FPS) in average, Shimoda et al [10] presents an FPGA implementation for real time object detection using thermal images that provides remarkable results either in accuracy and FPS performance, with YOLO architecture. These previous works show that it is possible to obtain relevant results combining object detection and thermal imaging.…”

Section: Literature Reviewmentioning

confidence: 99%

Study on the Application of EfficientDet to Real-Time Classification of Infrared Images from Video Surveillance

Mendes

Fernandes

et al. 2022

2022 International Conference on Electrical, Computer and Energy Technologies (ICECET)

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The monitoring of certain areas can be a tedious and non-interactive task that usually leads to some missed occurrences. With the development of object-detection models, this problem can be mitigated and reduced. In this paper, a rare application of EfficientDet model to the analysis of footage from an infrared camera in real-time is studied. The model will be used to detect deers, people and cars in images captured at the surroundings of a classified facility from where we do not yet have images available. Consequently, we show the process of creating the model and discuss the problems raised by the real-time performance limitations as well as by the available data limitations. The results obtained suggest that this kind of implementation has the potential to improve existing surveillance systems.

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An FPGA Implementation of Real-Time Object Detection with a Thermal Camera

Cited by 13 publications

References 4 publications

FPGA Based Dual Controller Design for EMI Reduction in Dc-Dc Converters

FPGA Based Dual Controller Design for EMI Reduction in Dc-Dc Converters

Demystifying the Soft and Hardened Memory Systems of Modern FPGAs for Software Programmers through Microbenchmarking

Study on the Application of EfficientDet to Real-Time Classification of Infrared Images from Video Surveillance

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