An FRAM-Based Nonvolatile Logic MCU SoC Exhibiting 100% Digital State Retention at <formula formulatype="inline"> <tex Notation="TeX">${\rm VDD}=$</tex></formula> 0 V Achieving Zero Leakage With <formula formulatype="inline"><tex Notation="TeX">${&lt;}$</tex> </formula>400-ns Wakeup Time for ULP Applications

Three-fold improved set-voltage variability of a Cu atom switch with a split electrode for very-large-scale integration

“…15(b), the equivalent σV set of type A, B and C devices are 80 mV, 48 mV and 28 mV, respectively, resulting in a three-fold improvement of the V set variability for type A. This variation is close to the V th variability of transistors, [19][20][21] indicating that the developed 4S-cell paves the way for atom switches to be used for large-scale integration of nonvolatile SoC [30][31][32] on a gigabit scale.…”

A Survey of Emerging Memory in a Microcontroller Unit

“…Type-like Flash NVMs refer to the emerging NVMs that directly store data in nonvolatile devices without the need for backup and restore operations and perform NOR Flash memory operations by imposing voltages corresponding to block-erase, random program, and random read. Previous reports indicate that FRAM consumes less power than Flash and DRAM, offering fast and high-bandwidth read/write operations [11,15,20]. Nevertheless, from the low clock frequency of FRAM-based MCUs in Table 1, it can be realized that FRAM still suffers from high power dissipation and limited clock frequency constraints when compared with other emerging NVMs.…”

“…The 6T-4C FRAM bitcell shown in Figure 3a is based on the Fecap, which is a nonlinear capacitor with hysteretic behavior. It has a much higher signal margin than the regular FRAM bitcells which utilize a single ended Fecap and two differential Fecaps, respectively [11]. This is because data are stored in all four capacitors in a complementary fashion, which also causes a higher area and power cost.…”

“…Previous reports have proposed two types of FRAM, one based on ferroelectric capacitors (Fecaps) [11] and the other on ferroelectric transistors (FeFETs) [12]. A Fecap is a nonlinear capacitor with hysteretic behavior, forming the basis of nonvolatility.…”

Power-gated 32 bit microprocessor with a power controller circuit activated by deep-sleep-mode instruction achieving ultra-low power operation

“…Recently, power-gating schemes using on-chip nonvolatile devices have been attracting much attention, and several chips with such power-gating schemes have been reported. [13][14][15][16][17][18] This is because nonvolatile FFs= memories using ferroelectric or magnetic devices, which have high-speed nonvolatile switching operation, have been practically integrated into silicon circuits. Enabling sudden power-down by introducing nonvolatile memories is very effective for reducing the performance cost of power gating and for more power reduction by a more frequent entry in the power-gating mode.…”