An image-rejecting mixer and vector filter with 55-dB image rejection over process, temperature, and transistor mismatch

Hornak, T.; Knudsen, K.L.; Grzegorek, A.Z.; Nishimura, K.A.; McFarland, W.

doi:10.1109/4.896225

Cited by 22 publications

(2 citation statements)

References 8 publications

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“…Although the tolerable timing error of the proposed DQDC is the same as that in [16], the current design features a higher CG of 0.45 (0.24 in [16]) while requesting a lower CLK rate of 4-fold the IF value (8-fold in [16]).…”

Section: Preselect Filter Dqdc and Clkgenmentioning

confidence: 95%

Experimental 1-V flexible-IF CMOS analogue-baseband chain for IEEE 802.11a/b/g WLAN receivers

Mak

Martins

2007

IET Circuits Devices Syst.

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A low-voltage low-power analogue-baseband chain designed for IEEE 802.11a/b/g wireless local-area network (WLAN) receivers is described. It features architecturally a 'two-step channel selection' to complement the radio front-end, and a flexible intermediate frequency (IF) reception capability to alleviate the cancellation of frequency and DC-offset. In circuit implementation, a double-quadrature downconverter based on a 'series-switching' mixerquad realises a wideband-accurate I/Q demodulation. A 'switched-current-resistor' programmable-gain amplifier (PGA) minimises the bandwidth variation and transient in gain tuning by stabilising, concurrently, the PGA's feedback factor and quiescent-operating point. An 'inside-OpAmp' DC-offset canceller creates area-efficiently a very low cutoff frequency high-pass pole at DC while providing a fast settling of DC-offset transients. Fabricated in a 0.35 mm complementary metal-oxide semiconductor (CMOS) process without resorting to any specialised device, the prototype consumes 14 mW per channel at 1 V. The transient time in a 52-dB gain step is ,1 ms and the stopband rejection ratio at 20/40 MHz is 32/90 dB. The error vector magnitudes are 227 and 217 dB for 802.11a/g and b modes, respectively.

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Section: Preselect Filter Dqdc and Clkgenmentioning

confidence: 95%

Experimental 1-V flexible-IF CMOS analogue-baseband chain for IEEE 802.11a/b/g WLAN receivers

Mak

Martins

2007

IET Circuits Devices Syst.

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“…They represent the major impediment to raise the integration level of wireless radios since they cannot be easily implemented monolithically [7]. Imagereject mixer architectures can be used to cancel the image signals [8][9][10][11]. However, due to the limited gain and phase mismatch, the image-rejection ratio is limited to 30-40 dB which is not high enough for most wireless applications [12,13].…”

Section: Introductionmentioning

confidence: 97%

A superheterodyne receiver front-end with on-chip automatically Q-tuned notch filters

Chi

Wang

Wong

2011

Analog Integr Circ Sig Process

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A superheterodyne receiver front-end with onchip automatically Q-tuned notch filters is proposed. The front-end includes a differential LNA and a Gilbert downconverter, where each block is coupled with an on-chip image-rejection notch filter to get high image-rejection ratio. Each notch filter is formed by one on-chip LC network and one negative-resistance cross-coupled pair to compensate for the loss of the LC network. The current through the cross-coupled pairs is automatically adjusted by an automatic Q tuning circuit so that the loss of the notch filter is perfectly compensated to achieve a deepest notch. The automatic Q tuning circuit is an analog-digital mixed signal circuit, and successive approximation register algorithm is used to search for the optimum current value. The superheterodyne receiver front-end has been implemented in 0.18 lm CMOS. Experimental results show that the circuit could achieve an image rejection ratio of 75 dB with 105 MHz IF Frequency. The LNA draws 5.86 mA current, and the down-converter draws 1.27 mA current while two image-rejection filters and the master VCO totally draw 363 lA current, all from a 1.8 V power supply.

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An Experimental 1-V Sip Receiver Analog-Baseband Ic For Ieee 802.11a/B/G Wlan

2007

Analog-Baseband Architectures and Circuits for Multistandard and Lowvoltage Wireless Transceivers

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An image-rejecting mixer and vector filter with 55-dB image rejection over process, temperature, and transistor mismatch

Cited by 22 publications

References 8 publications

Experimental 1-V flexible-IF CMOS analogue-baseband chain for IEEE 802.11a/b/g WLAN receivers

Experimental 1-V flexible-IF CMOS analogue-baseband chain for IEEE 802.11a/b/g WLAN receivers

A superheterodyne receiver front-end with on-chip automatically Q-tuned notch filters

An Experimental 1-V Sip Receiver Analog-Baseband Ic For Ieee 802.11a/B/G Wlan

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