An input multiplexed current mode transmitter for on-chip global interconnects

Abstract

In the literature, both current mode and voltage mode multiplexers are proposed for transmitters used to drive global interconnects. Current mode multiplexers operate at higher speeds at the cost of increase in power dissipation. In this paper, a novel technique is proposed to increase the operating speed of the current mode multiplexer by reducing the impedance at the output of the multiplexer. This is achieved by connecting a diode connected transistor as the load. The proposed transmitter is implemented using 180nm technology and studied through simulation with Synopsys HSPICE assuming an interconnect of length 7mm. It is found through simulation, that the interconnect driven by this transmitter has a lower delay by a factor of two compared to that obtained using repeater insertion technique. The proposed transmitter is also compared with that using output multiplexing scheme. It is found that the operating bandwidth of the proposed transmitter is two and half times more than that of output multiplexed transmitter. Both rise time and power dissipation are lower by a factor of two for the proposed transmitter compared to the output multiplexed transmitter with four inputs.Key words: Current mode multiplexer, Input multiplexed transmitter architecture, output multiplexed transmitter architecture, large bandwidth, less delay, less power.