An Integrated CMOS Bio-potential Amplifier with a Feed-Forward DC Cancellation Topology

Parthasarathy, Jayant; Erdman, Arthur G.; Redish, A. David; Ziaie, Babak

doi:10.1109/iembs.2006.259577

Cited by 34 publications

(10 citation statements)

References 11 publications

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“…<1Hz to 300 Hz) and the spikes signals ranging from 350 Hz to 10 kHz [5][6][7][8][9][10][11][12]. The amplifier is simulated using LTSpice in 90 nm CMOS technology.…”

Section: A Amplifier Gainmentioning

confidence: 99%

Low-voltage fully differential CMOS neural amplifier based on CFOA

ElGuindy

Madian

2013

2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)

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In this paper, a low voltage fully differential neural amplifier based on current feedback operational amplifier (CFOA) is introduced. The gains of LFP and spikes signals can be tuned using the amplifiers capacitors. The designed amplifier provides a maximum output gain up to 50 dB, a total power consumption of 4.218 nW, and an input referred noise of 3.38 µV/Hz 1/2 and 5.96 µV/Hz 1/2 for LFP signals and spikes signals, respectively. Moreover, the lower cutoff frequencies of the amplifier can be tuned using the pseudo-resistor. The neural amplifier has been simulated using LTspice with a CMOS technology of 90nm provided from MOSIS and power supply voltage of േ0.6V. The simulation results is demonstrated and discussed. Also, a performance comparison between the proposed amplifier and other neural amplifiers is presented.

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“…<1Hz to 300 Hz) and the spikes signals ranging from 350 Hz to 10 kHz [5][6][7][8][9][10][11][12]. The amplifier is simulated using LTSpice in 90 nm CMOS technology.…”

Section: A Amplifier Gainmentioning

confidence: 99%

Low-voltage fully differential CMOS neural amplifier based on CFOA

ElGuindy

Madian

2013

2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)

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“…1 shows the schematic of the proposed bio-amplifier which consists of a low-noise DDA, bandwidth (BW) and gain tuning blocks. The DC offset suppression is implemented in the BW block by adopting diode-connected MOS pseudo-resistors (M1 and M2) at the input of DDA along with the input PMOS gate capacitor (Cg) to create an RC high pass filter first introduced in [7]. Its time constant sets the low 3-dB cutoff frequency of the bio-amplifier.…”

Section: IImentioning

confidence: 99%

“…However, the MOS-bipolar resistance between input and output is highly dependent on the large output signal level, which results in distortion [2]. The forward DC cancellation scheme based on MOS pseudo-resistor can be utilized to create an RC high pass filter [7]. The amplifier can achieve DC offset rejection as well as small size without large passive devices.…”

Section: Introductionmentioning

confidence: 99%

A 1.8 µW area-efficient bio-potential amplifier with 90 dB DC offset suppression

Zhang

Chan

Wang

2014

2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)

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An area-efficient and low-power low-noise amplifier with adjustable parameters for bio-potential recording applications is presented. This amplifier replaces traditional analog filters using large AC coupling capacitor with the proposed DC offset suppression block based on Differential Difference Amplifier (DDA) structure, which allows the system to obtain good high pass characterization without using any area consuming capacitors or resistors. It features configurable gain and bandwidth, which is suitable for various bio-potential applications and massive integration in biomedical devices. More than 90 dB DC offset suppression ratio is achieved in rejecting large DC offset and baseline drift that exist at the skin-electrode interface. The proposed bio-amplifier, designed in a 0.18 Jim CMOS process and occupies only 0.027 mm 2 silicon area on chip, provides adjustable mid-band gain of 35.5/41.5/47.6/53.6 dB, tunable bandwidth from 0.01 Hz to 10 kHz. The back-annotated simulation results demonstrated the input-referred noise of 5.4 flVrms over 0.01 Hz-I0 kHz and the total power dissipation consumed as low as 1.8 JlW at 1.2 V power supply.

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“…A major challenge in realizing a single-chip amplifier that meets the above criteria is realizing the large passive elements necessary to achieve a high-pass filter in the near-dc range (to avoid filtering the slow-moving LFP) on silicon [13]. One approach is to use a metal-oxide-semiconductor (MOS) transistor biased in subthreshold (referred to as a subthreshold MOS resistor from here on), to achieve a very large resistance, although other groups have explored alternative techniques [14]. However, this approach limits the achievable gain in a single stage due to the small voltage drop the subthreshold MOS resistor can sustain before its resistance drops.…”

Section: A Hardwarementioning

confidence: 99%

Embedded Neural Recording With TinyOS-Based Wireless-Enabled Processor Modules

Farshchi

Pesterev

Nuyujukian

et al. 2010

IEEE Trans. Neural Syst. Rehabil. Eng.

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Abstract-To create a wireless neural recording system that can benefit from the continuous advancements being made in embedded microcontroller and communications technologies, an embedded-system-based architecture for wireless neural recording has been designed, fabricated, and tested. The system consists of commercial-off-the-shelf wireless-enabled processor modules (motes) for communicating the neural signals, and a back-end database server and client application for archiving and browsing the neural signals. A neural-signal-acquisition application has been developed to enable the mote to either acquire neural signals at a rate of 4000 12-bit samples per second, or detect and transmit spike heights and widths sampled at a rate of 16670 12-bit samples per second on a single channel. The motes acquire neural signals via a custom low-noise neural-signal amplifier with adjustable gain and high-pass corner frequency that has been designed, and fabricated in a 1.5-m CMOS process. In addition to browsing acquired neural data, the client application enables the user to remotely toggle modes of operation (real-time or spike-only), as well as amplifier gain and high-pass corner frequency.Index Terms-Biomedical electronics, embedded sensor, low-power circuit design, neural amplifier, unit detection.

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An Integrated CMOS Bio-potential Amplifier with a Feed-Forward DC Cancellation Topology

Cited by 34 publications

References 11 publications

Low-voltage fully differential CMOS neural amplifier based on CFOA

Low-voltage fully differential CMOS neural amplifier based on CFOA

A 1.8 µW area-efficient bio-potential amplifier with 90 dB DC offset suppression

Embedded Neural Recording With TinyOS-Based Wireless-Enabled Processor Modules

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