An integrated CMOS-MEMS probe having two-tips per cantilever for individual contact sensing and kelvin measurement with two cantilevers

Hosaka, K.; Morishita, Satoshi; Mori, Ikue; Kubota, M.; Mita, Yoshio

doi:10.1109/icmts.2013.6528136

Cited by 8 publications

(2 citation statements)

References 6 publications

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“…A typical application example is a MEMS probe card for on-wafer testing of electron devices. 30) Many unique features can be introduced, such as pin-by-pin signal amplification, impedance conversion, and touch sensing, owing to the CMOS circuit integration.…”

Section: Cantilever Mems Made Of Cmos On Thick Soimentioning

confidence: 99%

Opportunities of CMOS-MEMS integration through LSI foundry and open facility

Mita¹,

Lebrasseur²,

Okamoto³

et al. 2017

Jpn. J. Appl. Phys.

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Since the 2000s, several countries have established micro- and nanofabrication platforms for the research and education community as national projects. By combining such platforms with VLSI multichip foundry services, various integrated devices, referred to as “CMOS-MEMS”, can be realized without constructing an entire cleanroom. In this paper, we summarize MEMS-last postprocess schemes for CMOS devices on a bulk silicon wafer as well as on a silicon-on-insulator (SOI) wafer using an open-access cleanroom of the Nanotechnology Platform of MEXT Japan. The integration devices presented in this article are free-standing structures and postprocess isolated LSI devices. Postprocess issues are identified with their solutions, such as the reactive ion etching (RIE) lag for dry release and the impact of the deep RIE (DRIE) postprocess on transistor characteristics. Integration with nonsilicon materials is proposed as one of the future directions.

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Section: Cantilever Mems Made Of Cmos On Thick Soimentioning

confidence: 99%

Opportunities of CMOS-MEMS integration through LSI foundry and open facility

Mita¹,

Lebrasseur²,

Okamoto³

et al. 2017

Jpn. J. Appl. Phys.

Self Cite

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“…The authors proposed direct probing of microbumps to eliminate the need for dedicated prebond probe pads. A CMOS-MEMS integrated probe card is presented in [18] to reduce the scrub marks and increase the measurement accuracy and precision. In this paper, cantilever probes with two tips are proposed to measure the electrical characteristics of contacts.…”

Section: Current Solutionsmentioning

confidence: 99%

Low-Contact Resistance Probe Card Using MEMS Technology

Kandalaft

Basith

Rashidzadeh

2014

IEEE Trans. Instrum. Meas.

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Multichannel die probing increases test speed and lowers the overall cost of testing. A new high-density wafer probe card based on MEMS technology is presented in this paper. MEMS-based microtest-channels have been designed to establish high-speed low-resistance connectivity between the dieunder-test and the tester at the wafer level. The proposed test scheme can be used to probe fine pitch pads and interconnects of a new generation of 3-D integrated circuits. The proposed MEMS probe, which is fabricated with two masks, supports 10 6 lifetime touchdowns. Measurement results using a prototype indicate that the proposed architecture can be used to conduct manufacturing tests up to 38.6 GHz with less than −1-dB insertion loss while maintaining 11.4-m contact resistance. The measured return loss of the probe at 39.6 GHz is −12.05 dB.Index Terms-Automatic test equipment, design-for-testing, manufacturing test, MEMS probe, signal integrity, wafer probe card.

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