An Integrated Modular and Standard Cell VLSI Design Approach

Kasai, R.; Fukami, Kimihiko; Tansho, K.; Kitazawa, Hideaki; Horiguchi, S.

doi:10.1109/jssc.1985.1052321

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The Module Generator Procedures -1

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1985

1987

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Cited by 3 publications

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“…Obviously structure logic is to be used for digital word processing : counters, registers, ALU, memory, multipliers, systolic arrays etc... It provides much better integration density than standard cells [13]. Matrix programmed logic (Fig.…”

Section: The Module Generator Procedures -mentioning

confidence: 99%

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Evolution of CAD tools towards third generation custom VLSI design

Man

1987

Rev. Phys. Appl. (Paris)

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Section: The Module Generator Procedures -mentioning

confidence: 99%

“…Cl : Silicon density is too low. Experiments [12] indicate differences of a factor 2...3 with respect to manual design mainly because of lack of the exploitation of array structure in logic such as data-paths, ROM, RAM, systolic arrays, etc... [13]. C2 : The gate level is a too low design level.…”

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confidence: 99%