An Integrated Sliding-Mode Buck Converter With Switching Frequency Control for Battery-Powered Applications

This paper presents two circuits that allow us to accurately detect either the inductor current zero crossing, or the continuous/discontinous conduction modes boundary in the switched-mode dc-dc converters. Achieved detection accuracy allows us to improve the control and efficiency of the integrated high-output current converters, i.e., converters with low-resistance power switches. Detection is based on the voltage zero-cross detector, which provides ideally zero input-referred offset and very fast results. The concept of voltage polarity detector is based on the association of a dynamic current mirror and a simple autozero comparator. This paper describes the main concept of both circuits, aspects of the design allowing us to achieve high accuracy, and presents obtained results. Circuits' performances are demonstrated on the integrated step-down dc-dc converter with I O U T = 2.5 A 30-mΩ NMOS power stage. Measured accuracy of the detection is in order of <15 mA.

Section: Measured Resultsmentioning

confidence: 98%

Inductor Current Zero-Crossing Detector and CCM/DCM Boundary Detector for Integrated High-Current Switched-Mode DC–DC Converters

Michal

2014

“…In [16]- [19], different architectures with pseudoconstant frequency modulation based on a hysteretic modulation with an outer frequency loop are proposed. These architectures, in general, do not exhibit this worst-case transient.…”

Section: Effect In the Voltage Deviation Of The Inherent Delays Imentioning

confidence: 99%

Improved transient response of controllers by synchronizing the modulator with the load step: application to v2ic

Cortés

Šviković

Alou

et al. 2015

Abstract-V2 I C is a ripple-based control with an excellent performance for load transients and reference voltage tracking because it exhibits a feedforward of the load current and the error of the output voltage. However, if V 2 I C is modulated with constant frequency, constant on-time or constant off-time, its dynamic response is hindered by delays in the response. This paper proposes a technique that synchronizes the clock of the converter to initialize the duty cycle when a worst-case load transient occurs using the current through the output capacitor to detect load transients. It is exemplified on a V 2 I c control but it is applicable to most of controllers as it only acts on the modulator.Index Terms-Clock synchronization, dynamic voltage scaling, load transient, point of load, V 2 I C .

“…The F SW variation could be reduced if needed by controlling the main parameters in (10) such as the propagation delay [1], the hysteresis window [38], [39], or the integration time constant [40]. For this implementation, the variable F SW will be exploited to help spread the energy of the radiated EMI components.…”

Section: Self-oscillating Modulator Considerationsmentioning

confidence: 99%

“…Switching DC-DC converters have been used in power management modules to achieve high-efficiency power conversion in battery-powered devices [1]- [4]. The class-D amplifier (CDA) uses a similar switching output stage as DC-DC converters to provide outstanding audio performance with high efficiency; but, to truly extend battery life, low power consumption is also required when the system is active.…”

Section: Introductionmentioning

confidence: 99%

A High-Efficiency Self-Oscillating Class-D Amplifier for Piezoelectric Speakers

Colli-Menchi

Sánchez-Sinencio

2015

The design tradeoffs of the class-D amplifier (CDA) for driving piezoelectric (PZ) speakers are presented, including efficiency, linearity, and electromagnetic interference. An implementation is proposed to achieve high efficiency in the CDA architecture for PZ speakers to extend battery life in mobile devices. A self-oscillating closed-loop architecture is used to obviate the need for a carrier signal generator to achieve low power consumption. The use of stacked-cascode CMOS transistors at the H-bridge output stage provides low input capacitance to allow high switching frequency to improve linearity with high efficiency. Moreover, the CDA monolithic implementation achieves 18 V P P output voltage swing in a low voltage CMOS technology without requiring expensive high-voltage semiconductor devices. The prototype experimental results achieved a minimum THD+N of 0.025%, and a maximum efficiency of 96%. Compared to available CDA for PZ speakers, the proposed CDA achieved higher linearity, lower power consumption, and higher efficiency. a larger silicon area; thus, increasing the cost of the amplifier. Commercial CDA architectures for PZ speakers provide high-voltage outputs using these devices, but the distortion and power consumption is still large [27]- [30].Other switching output stages have been proposed to drive high-voltage capacitive actuators for different applications [31], [32]. Nonetheless, the primary objective of these applications is to deliver the maximum amount of energy at the actuator's resonant point, making them not suitable for audio applications.This work discusses the design tradeoffs of the CDA architecture for driving PZ speakers, especially when low power consumption and high efficiency are desired. An example implementation is proposed to achieve high efficiency and high linearity in the CDA architecture for PZ speakers to extend battery life in mobile devices. The self-oscillating closed-loop architecture is used to obviate the need of a carrier signal generator to achieve high linearity with low power consumption. Moreover, the CDA monolithic implementation is able to provide an 18 V pp output voltage swing in an 1.8 V core-voltage twin-well 11-16 Ω-cm p-type substrate CMOS technology without requiring expensive special high-voltage semiconductor devices. The use of stacked-cascode CMOS transistors at the H-bridge output stage provides low input capacitance to allow high switching frequency to improve linearity without sacrificing the high efficiency. This paper is organized as follows: Section II reviews the PZ speaker details and design considerations for the CDA. Section III discuses the CDA architecture for PZ speakers and its tradeoffs. Section IV presents the measurement results of the monolithic implementation prototype, and Section V concludes the paper. II. PIEZOELECTRIC SPEAKERS A. Structure and operationThe physical structure of a typical PZ speaker is shown in Fig. 2 where a PZ element is attached to a film encased between a front panel and rear panel. The PZ element deflect...