An MDAC synapse for analog neural networks

Abstract

Efficient weight storage and multiplication are important design challenges which must be addressed in analog neural network implementations. Many schemes which treat storage and multiplication separately have been previously reported for implementation of synapses. We present a novel synapse circuit that integrates the weight storage and multiplication into a single, compact multiplying digital-to-analog converter (MDAC) circuit. The circuit has a small layout area (5400 µm 2 in a 1.5-µm process) and exhibits good linearity over its entire input range.We have fabricated several synapses and characterized their responses. Average maximum INL and DNL values of 0.2 LSB and 0.4 LSB, respectively, have been measured. We also report on the performance of an analog recurrent neural network which uses these new synapses.

Design and Implementation of Multipattern Generators in Analog VLSI

“…10 is based on a resistive -DAC. This circuit is similar to our previously reported MDAC synapse [31], [32]. The primary difference between the two circuits lies in the sign bit circuitry.…”

A digitally programmable calibration circuit for smart sensors

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