An MPI-based MPSoC Platform in FPGA

Uhlendorf, Roseli; Silva, Eduardo; Viel, Felipe; Zeferino, Cesar Albenes

doi:10.1109/tla.2021.9448553

Cited by 2 publications

(5 citation statements)

References 24 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…An alternative to RTL simulation is prototyping FPGA to validate the proposed system. In this context, we found works [12,[14][15][16][17] that enable the exploration of user-level applications in the designed many-core systems. In contrast, HERO [13] support an OS execution, enabling multitasking.…”

Section: Discussionmentioning

confidence: 99%

“…In contrast, HERO [13] support an OS execution, enabling multitasking. ANDROMEDA [15] and Uhlendorft et al [17] proposals do not provide the capability to create a heterogeneous system. However, Chipyard [14], and ProNoC [12] offer peripheral support.…”

Section: Discussionmentioning

confidence: 99%

“…Uhlendorf et al [17] present a many-core platform described in synthesizable VHDL that embeds the soft-core Nios II as PEs interconnected throughout an NoC. The Authors validate the platform using a Cyclone V FPGA.…”

Section: Fpga Platfomsmentioning

confidence: 99%

See 2 more Smart Citations

Chronos-v: a many-core high-level model with support for management techniques

Weber,

Dal Zotto,

Moraes

2023

Analog Integr Circ Sig Process

View full text Add to dashboard Cite

This work presents Chronos-V, a Many-Core System-on-Chip (MCSoC) that adopts abstract hardware modeling, executing the FreeRTOS Operating System (OS) at each processing element (PE). Chronos-V is a heterogeneous architecture with two regions: (i) General Purpose Processing Elements (GPPE), responsible for executing user applications; (ii) peripherals that provide IO capabilities or hardware acceleration to the system. Besides the standard goal of high-level models, design space exploration at early design stages with reduced simulation time, our goal is to advance the state-of-the-art in the MCSoC research field by proposing an architecture with hardware and software support for management techniques. As a case study, we present an ODA (Observe-Decide-Actuate) loop for thermal management, comparing it to a dark silicon patterning mapping in a platform with 196 PEs. Thermal maps show the benefits of using dynamic thermal management in terms of hotspot avoidance and temperature reduction.

show abstract