An on-chip dual supply charge pump system for 45nm PD SOI eDRAM

Abstract

We present an on-chip word line (WL) dual supply system for server class embedded DRAM (eDRAM) applications. The design consists of switched capacitor charge pumps, voltage regulators, reference and clock circuits. Charge pump engines feature efficient charge transfer and energy conversion, boosting unregulated rails to 1.8x supply. At vdd=1V, regulated high (1.5 to 1.7V) and low (-0.3 to -0.6V) levels ensure WL overdrive and cell turn-off, respectively, with rippling <±35mV and maintenance power <780uW/2Mb-DRAM. The system supports >2GHz AC array access and can endure excessive DC load.