An Optimized FPGA Implementation for a Parallel Path Planning Algorithm Based on Marching Pixels

Abstract

Path Planning is one of the most computationally intensive tasks in robot systems and a challenge in dynamically changing environments. By means of FPGAs it is possible to process time-critical and data-intensive tasks in robot systems efficiently. We have developed a parallel path planning algorithm which is based on Marching Pixels, an organic computing principle. The algorithm is optimized for FPGAbased processing. A parallel implementation approach together with an efficient buffering of the map data allowed us to obtain a processing rate suitable for realtime applications, even for higher resolutions. We achieved a processing rate of 80 maps per second for VGA resolution (640x480) on a midsize Virtex-5 FPGA.

Field Programmable Gate Array Applications—A Scientometric Review

“…• Localization [1150][1151][1152][1153][1154][1155][1156] • Trajectory/path planing [498,[1157][1158][1159][1160][1161][1162][1163] • Visual servoing [483,[1164][1165][1166][1167][1168][1169] • Navigation [11,1153,[1170][1171][1172][1173] • Stereo vision [1173][1174][1175][1176][1177] • Object/person follower/tracking [1168,[1178][1179][1180] • Ultrasonic Sensors [1181][1182][1183][1184][1185] • Robot Operating System (ROS) [1153,[1186][1187][1188][1189] • Educational [1190]…”