An Optimized Implementation of a Two-Sample Phase Locked Loop with Frequency Feedback for Single-Phase Sensorless Bridgeless PFC

Lamo, Paula; Pigazo, Alberto; Ruiz, Gustavo A.; Azcondo, F.J.; López, Felipe

doi:10.1109/compel.2018.8459965

Cited by 5 publications

(4 citation statements)

References 10 publications

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“…While [25] uses a scheme that combines CORDIC and the LUT which, due to the symmetric characteristic of the sine and cosine function, only the information of a quarter of a period is included. Moreover, in [26,27], DCOs are implemented in a fixed-point DSP. As an example, in Figure 2, the structure of the proposed DCO is presented.…”

Section: Principle Of Operation and Types Of Pllsmentioning

confidence: 99%

“…The implementation of the 2S-QSG requires low computational burden. Furthermore, a simplification of its algorithm has been proposed, starting from the first term of the Taylor series of trigonometric functions and assuming a high sampling frequency [79], as well as the elimination of the division operation and the use of digital oscillators such as VCO [27]. A handicap of this strategy is its low immunity to noise and harmonic distortion of the voltage, which has been solved in [80], including an adaptive filter in its structure.…”

Section: Pll Based On Two-samplementioning

confidence: 99%

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Evaluation of Quadrature Signal Generation Methods with Reduced Computational Resources for Grid Synchronization of Single-Phase Power Converters through Phase-Locked Loops

2020

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Low-cost single-phase grid connected converters require synchronization with the grid voltage to obtain a better response and protection under diverse conditions, such as frequency perturbations and distortion. Phase-locked loops (PLLs) have been used in this scenario. This paper describes a set of quadrature signal generators for single-phase PLLs; compares the performances by means of simulation tests considering diverse operation conditions of the electrical grid; proposes strategies to reduce the computational burden, considering fixed-point digital implementations; and provides both descriptive and quantitative comparisons of the required mathematical operations and memory units for implementation of the analyzed single-phase PLLs.

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Section: Principle Of Operation and Types Of Pllsmentioning

confidence: 99%

Section: Pll Based On Two-samplementioning

confidence: 99%

Evaluation of Quadrature Signal Generation Methods with Reduced Computational Resources for Grid Synchronization of Single-Phase Power Converters through Phase-Locked Loops

2020

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“…The PLL 2S proposed in [5] is employed in this work with a new harmonic filtering structure embedded in the PLL, as shown in Fig. 2, to make it less sensitive to the grid voltage disturbance and provide a better carrier signal to comply with the current harmonic limits.…”

Section: Two-samples Pllmentioning

confidence: 99%

Low THDi Controller for Current Sensorless Single Phase Rectifiers using a Two-Sample Phase Locked Loop

Lamo

Ruiz

Pigazo

et al. 2019

2019 20th Workshop on Control and Modeling for Power Electronics (COMPEL)

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Two-sample phase locked loop (2S PLL) with harmonic filtering capacity is used in a non-linear control (NLC) to cancel the current estimation errors in a current sensorless Boost power factor corrector (PFC) to obtain a sinusoidal current independent on the grid disturbances and prevent their propagation. The resulting line current using the proposed PLL 2S against a zero-crossing detector (ZCD) is compared in simulation and experimentally.

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“…A drawback of this approach is the low immunity to voltage harmonic distortion. The digital implementation of the 2S PLL proposed in [48] is aimed at minimizing the computational burden of the 2S PLL for implementation in a field-programmable gate array (FPGA) but it does not improve its harmonic filtering capability.…”

Section: Introductionmentioning

confidence: 99%

Two-Sample PLL With Harmonic Filtering Capability Applicable to Single-Phase Grid-Connected Converters

Lamo

Pigazo

Azcondo

2021

IEEE J. Emerg. Sel. Topics Power Electron.

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The two-sample phase locked loop (2S PLL) in single-phase digitally-controlled grid-connected power converters provide synchronization with a minimal computational burden. However, the distortion of the grid voltage deteriorates the performance of the 2S quadrature signal generator. To solve this issue, this paper introduces a harmonic filtering (HF) structure based on observers of the input voltage for the fundamental and selected harmonics. The stability and sensitivity of the 2S PLL with HF is analyzed. In comparison with SOGI based HF, the observers provide a narrower band pass and the subsequent deterioration of the response time is compensated by adapting the filter gains dynamically. The results obtained, both in simulation and experimentally, validate the proposal and compare its performance with other widely adopted PLLs providing harmonic rejection capability. The computational burden is analyzed and in the case of the proposals depends on the number of observers and the use or not of the adaptive strategy based on steepest descent.

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An Optimized Implementation of a Two-Sample Phase Locked Loop with Frequency Feedback for Single-Phase Sensorless Bridgeless PFC

Cited by 5 publications

References 10 publications

Evaluation of Quadrature Signal Generation Methods with Reduced Computational Resources for Grid Synchronization of Single-Phase Power Converters through Phase-Locked Loops

Evaluation of Quadrature Signal Generation Methods with Reduced Computational Resources for Grid Synchronization of Single-Phase Power Converters through Phase-Locked Loops

Low THDi Controller for Current Sensorless Single Phase Rectifiers using a Two-Sample Phase Locked Loop

Two-Sample PLL With Harmonic Filtering Capability Applicable to Single-Phase Grid-Connected Converters

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