An optimized methodology to design CMOS operational amplifier

Loulou, Mourad; Ali, Shafqat; Fakhfakh, Mourad; Nouri, Mohammad

doi:10.1109/icm-02.2002.1161486

Cited by 9 publications

(6 citation statements)

References 2 publications

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“…Analog circuits ISSN: 2088-8694  design is a hard task that relies on the designer's experience [15]. In [16], [17], and [18], some optimization techniques have been used named the statistic-based sizing approaches. These techniques are time consuming and require a 'good' starting quiescent point [16].…”

Section: Introductionmentioning

confidence: 99%

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Optimal design of BiCMOS second generation current conveyor using the genetic algorithm

Asmae

Benhala

Zorkani

2023

IJPEDS

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This article presents an innovative implementation of the plus-type second-generation current conveyor (CCII+) using BiCMOS technology, which combines the benefits of bipolar and CMOS technologies. The optimization problem of minimizing the X-port input resistance and maximizing the current cut-off frequency value was solved using genetic algorithm (GA). The proposed approach allows the optimization of the BiCMOS CCII+ to achieve better performance compared to previous designs. As a practical application, a second-order band-pass filter using the optimized BiCMOS CCII+ was successfully realized. The performance of the proposed design was evaluated using SPICE simulations and compared with previously published works. This study shows that the BiCMOS CCII+ can be effectively optimized using GA to improve its performance, which has potential applications in various analog and mixed-signal circuits.

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Section: Introductionmentioning

confidence: 99%

“…In [16], [17], and [18], some optimization techniques have been used named the statistic-based sizing approaches. These techniques are time consuming and require a 'good' starting quiescent point [16].…”

Section: Introductionmentioning

confidence: 99%

Optimal design of BiCMOS second generation current conveyor using the genetic algorithm

Asmae

Benhala

Zorkani

2023

IJPEDS

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“…Deterministic approach for analog circuit design needs good starting point, which can be assigned by analog designer [3][4][5][6]. The accuracy of this method is depends on the dc point and the knowledge of analog designer.…”

Section: Introductionmentioning

confidence: 99%

An Optimal Design of CMOS Two Stage Comparator Circuit using Swarm Intelligence Technique

Sasikumar

Muthaiah

2018

IJRES

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A swarm intelligent based optimization technique named as Flower pollination algorithm (FPA) is applied for the design of the CMOS two stage comparator circuit. The basic idea of FPA mimics the flower pollination process of flowering plants. The input control parameters of FPA improve the exploration and exploitation capabilities of optimization problem. This paper presents the design of a CMOS two-stage comparator circuit using simulation based model called swarm intelligence technique. Simulation results shows that the proposed method is capable to determine the transistor sizes and bias current values of the CMOS comparator. The results obtained from the FPA improved the design performance of comparator in terms of power consumption, MOS transistor area and gain. To investigate the efficiency of proposed approach, comparisons have been carried out with differential evolution (DE) and harmony search (HS) algorithm based circuit design. The performances of FPA based comparator design are better than the previously reported works

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“…Common approaches are generally either fixed topology ones or/and statistic-based techniques (see for instance [5][6][7][8]). They generally start with finding a ''good'' DC operating point, which is provided by the analog 'expert' designer.…”

Section: Introductionmentioning

confidence: 99%

Analog circuit design optimization through the particle swarm optimization technique

Fakhfakh

Cooren

Sallem

et al. 2009

Analog Integr Circ Sig Process

165

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This paper details the Particle Swarm Optimization (PSO) technique for the optimal design of analog circuits. It is shown the practical suitability of PSO to solve both mono-objective and multiobjective discrete optimization problems. Two application examples are presented: maximizing the voltage gain of a low noise amplifier for the UMTS standard and computing the Pareto front of a biobjective problem, maximizing the high current cut off frequency and minimizing the parasitic input resistance of a second generation current conveyor. The aptness of PSO to optimize difficult circuit problems, in terms of numbers of parameters and constraints, is shown.

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An optimized methodology to design CMOS operational amplifier

Cited by 9 publications

References 2 publications

Optimal design of BiCMOS second generation current conveyor using the genetic algorithm

Optimal design of BiCMOS second generation current conveyor using the genetic algorithm

An Optimal Design of CMOS Two Stage Comparator Circuit using Swarm Intelligence Technique

Analog circuit design optimization through the particle swarm optimization technique

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