An overview of micron's automata processor

Wang, Ke; Angstadt, Kevin; Bo, Chunkun; Brunelle, Nathan; Sadredini, Elaheh; Tracy, Tommy; Wadden, Jack; Stan, Mircea R.; Skadron, Kevin

doi:10.1145/2968456.2976763

Cited by 25 publications

(11 citation statements)

References 9 publications

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“…Table 1 summarizes the schemes that we evaluate in this paper. iNFAnt [14] and NFA-CG [67] are prior works in the area of NFA Processing in GPUs as discussed in Section 3.3. iNFAnt [14] [54] to Time AP_ideal to obtain Time AP . Both these models are optimistic because we ignore other overheads of AP, such as the time taken to record reports (i.e., matches).…”

Section: Evaluation Methodologymentioning

confidence: 99%

See 1 more Smart Citation

Why GPUs are Slow at Executing NFAs and How to Make them Faster

Liu

Pai

Jog

2020

Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Syste

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Non-deterministic Finite Automata (NFA) are space-efficient finite state machines that have significant applications in domains such as pattern matching and data analytics. In this paper, we investigate why the Graphics Processing Unit (GPU)-a massively parallel computational device with the highest memory bandwidth available on generalpurpose processors-cannot efficiently execute NFAs. First, we identify excessive data movement in the GPU memory hierarchy and describe how to privatize reads effectively using GPU's on-chip memory hierarchy to reduce this excessive data movement. We also show that in several cases, indirect table lookups in NFAs can be eliminated by converting memory reads into computation, to further reduce the number of memory reads. Although our optimization techniques significantly alleviate these memory-related bottlenecks, a side effect of these techniques is the static assignment of work to cores. This leads to poor compute utilization, where GPU cores are wasted on idle NFA states. Therefore, we propose a new dynamic scheme that effectively balances compute utilization with reduced memory usage. Our combined optimizations provide a significant improvement over the previous state-ofthe-art GPU implementations of NFAs. Moreover, they enable current GPUs to outperform the domain-specific accelerator for NFAs (i.e., Automata Processor) across several applications while performing within an order of magnitude for the rest of the applications. CCS Concepts • Computing methodologies → Parallel algorithms; • Computer systems organization → Single instruction, multiple data; • Theory of computation → Formal languages and automata theory.

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Section: Evaluation Methodologymentioning

confidence: 99%

“…In particular, the Automata Processor (AP) proposed by Micron [17] is an in-memory accelerator for NFAs. The AP achieves significant throughput and energy benefits because of its ability to perform in-memory computations that exploit the parallelism of NFAs [17,54]. However, APs have to deal with several challenges.…”

Section: Introductionmentioning

confidence: 99%

Why GPUs are Slow at Executing NFAs and How to Make them Faster

Liu

Pai

Jog

2020

Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Syste

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“…The Automata Processor (AP) was an outstanding spatial reconfigurable architecture that embedded a target automaton into the reconfigurable fabric [13,37]. While it was a promising solution with high performance [29,42] and no FPGA bitstream overhead [24,38], only simulation results of the AP were reported while we show a prototype executed on FPGA [6] 4 .…”

Section: Related Workmentioning

confidence: 99%

CICERO: A Domain-Specific Architecture for Efficient Regular Expression Matching

Parravicini

Conficconi

Sozzo

et al. 2021

ACM Trans. Embed. Comput. Syst.

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Regular Expression (RE) matching is a computational kernel used in several applications. Since RE complexity and data volumes are steadily increasing, hardware acceleration is gaining attention also for this problem. Existing approaches have limited flexibility as they require a different implementation for each RE. On the other hand, it is complex to map efficient RE representations like non-deterministic finite-state automata onto software-programmable engines or parallel architectures. In this work, we present CICERO , an end-to-end framework composed of a domain-specific architecture and a companion compilation framework for RE matching. Our solution is suitable for many applications, such as genomics/proteomics and natural language processing. CICERO aims at exploiting the intrinsic parallelism of non-deterministic representations of the REs. CICERO can trade-off accelerators’ efficiency and processors’ flexibility thanks to its programmable architecture and the compilation framework. We implemented CICERO prototypes on embedded FPGA achieving up to 28.6× and 20.8× more energy efficiency than embedded and mainstream processors, respectively. Since it is a programmable architecture, it can be implemented as a custom ASIC that is orders of magnitude more energy-efficient than mainstream processors.

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“…To allow mapping automata onto hardware platform sometimes requires transforming automata into another functionally equivalent automata, but having different structure. One of the approaches of NFA transformation is VASIM Relaxation [38], which includes two main approaches: Fan-in and Fan-out Relaxations.…”

Section: Vasim Relaxationmentioning

confidence: 99%

An Overlay Architecture for Pattern Matching

Karakchi

Daniels

Bakos

2019

2019 IEEE 30th International Conference on Application-Specific Systems, Architectures and Processors (ASAP)

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It is the dream of a young woman from a destroyed third-world country in the Middle East, suffered fear, faith persecution, and insecurity. Seven years in first-world country where everything is new, starting from nowhere and stepping through many challenges. With two little sons and husband, living the happiness, unhappiness, success, disappointments, longing to reunite with the parents, and the fear of the unknown future. Proudly, I'm presenting my dissertation, the outcome of this journey, and it would not have been possible without the contribution of several people. First, I would like to express my sincere gratitude to my advisor Dr. Jason Bakos, for his exemplary support, patience and guidance throughout my doctoral studies.

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An overview of micron's automata processor

Cited by 25 publications

References 9 publications

Why GPUs are Slow at Executing NFAs and How to Make them Faster

Why GPUs are Slow at Executing NFAs and How to Make them Faster

CICERO: A Domain-Specific Architecture for Efficient Regular Expression Matching

An Overlay Architecture for Pattern Matching

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