An Overview of the Blue Gene/L System Software Organization

Almási, George; Bellofatto, R.; Brunheroto, José R.; Caşcaval, Călin; Castaños, José G.; Ceze, Luís; Crumley, P.; Erway, C. Christopher; Gagliano, Joseph A.; Lieber, Derek; Martorell, Xavier; Moreira, José E.; Sanomiya, A.; Strauß, Karin

doi:10.1007/978-3-540-45209-6_79

Cited by 26 publications

(13 citation statements)

References 7 publications

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“…We model nine 256MBit x 8 chips to provide 256MB of memory with specifications obtained from Micron Technology Inc. data sheets [16] with memory operating at 266MHz. We verified our approach by observing that the timing delays for our system with the CPU clock frequency at 700MHz is similar to those reported in the literature [1,24].…”

Section: Base Architecturesupporting

confidence: 81%

Conjugate gradient sparse solvers: performance-power characteristics

Malkowski

Lee

Raghavan

et al. 2006

Proceedings 20th IEEE International Parallel &Amp; Distributed Processing Symposium

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We characterize the performance and power attributes of the conjugate gradient (CG) sparse solver which is widely used in scientific applications. We use cycle-accurate simulations with SimpleScalar and Wattch, on a processor and memory architecture similar to the configuration of a node of the BlueGene/L. We first demonstrate that substantial power savings can be obtained without performance degradation if low power modes of caches can be utilized. We next show that if Dynamic Voltage Scaling (DVS) can be used, power and energy savings are possible, but these are realized only at the expense of performance penalties. We then consider two simple memory subsystem optimizations, namely memory and level-2 cache prefetching. We demonstrate that when DVS and low power modes of caches are used with these optimizations, performance can be improved significantly with reductions in power and energy. For example, execution time is reduced by 23%, power by 55% and energy by 65% in the final configuration at 500MHz relative to the original at 1GHz. We also use our codes and the CG NAS benchmark code to demonstrate that performance and power profiles can vary significantly depending on matrix properties and the level of code tuning. These results indicate that architectural evaluations can benefit if traditional benchmarks are augmented with codes more representative of tuned scientific applications.

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Section: Base Architecturesupporting

confidence: 81%

Conjugate gradient sparse solvers: performance-power characteristics

Malkowski

Lee

Raghavan

et al. 2006

Proceedings 20th IEEE International Parallel &Amp; Distributed Processing Symposium

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“…The Blue Gene/L series of supercomputer nodes run with a Lightweight Kernel (LWK) called the Blue Gene/L Run Time Supervisor (BLRTS) [2] that shares an address space with applications and forwards system calls to a specialized I/O node. While the bridging mechanism between the nodes is similar, there is no mechanism for porting a legacy application to BLRTS.…”

Section: Related Workmentioning

confidence: 99%

Multiverse: Easy Conversion of Runtime Systems into OS Kernels via Automatic Hybridization

Hale

Hetland²,

Dinda³

2017

2017 IEEE International Conference on Autonomic Computing (ICAC)

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The hybrid runtime (HRT) model offers a path towards high performance and efficiency. By integrating the OS kernel, runtime, and application, an HRT allows the runtime developer to leverage the full feature set of the hardware and specialize OS services to the runtime's needs. However, conforming to the HRT model currently requires a port of the runtime to the kernel level, for example to the Nautilus kernel framework, and this requires knowledge of kernel internals. In response, we developed Multiverse, a system that bridges the gap between a built-from-scratch HRT and a legacy runtime system. Multiverse allows unmodified applications and runtimes to be brought into the HRT model without any porting effort whatsoever by splitting the execution of the application between the domains of a legacy OS and an HRT environment. We describe the design and implementation of Multiverse and illustrate its capabilities using the massive, widely-used Racket runtime system.

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“…The system software for Blue Gene/L [12] is a combination of standard and custom solutions. The I/O nodes execute a version of the Linux kernel for embedded processors and are the primary offload engine for most system services.…”

Section: System Software Overviewmentioning

confidence: 99%

Scaling MPI to short-memory MPPs such as BG/L

Farreras

Cortes

Labarta

et al. 2006

Proceedings of the 20th Annual International Conference on Supercomputing

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Scalability to large number of processes is one of the weaknesses of current MPI implementations. Standard implementations are able to scale to hundreds of nodes, but not beyond. The main problem in these implementations is that they assume some resources (for both data and control-data) will always be available to receive/process unexpected messages. As we will show, this is not always true, especially in short-memory machines like the BG/L that has 64K nodes but each node only has 512Mbytes of memory.The objective of this paper is to present one algorithm that improves the robustness of MPI implementations for short-memory MPPs, taking care of data and control-data reception, the system will scale up to any number of nodes . The proposed solution achieves this goal without any observable overhead when there are no memory problems. Furthermore, in the worst case, when memory resources are extremely scarce, the overhead will never double the execution time (and we should never forget that in this extreme situation, traditional MPI implementations would fail to execute).

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An Overview of the Blue Gene/L System Software Organization

Cited by 26 publications

References 7 publications

Conjugate gradient sparse solvers: performance-power characteristics

Conjugate gradient sparse solvers: performance-power characteristics

Multiverse: Easy Conversion of Runtime Systems into OS Kernels via Automatic Hybridization

Scaling MPI to short-memory MPPs such as BG/L

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