An Overview on Loop Tiling Techniques for Code Generation

Hammami, Emna; Slama, Yosr

doi:10.1109/aiccsa.2017.168

Cited by 9 publications

(3 citation statements)

References 33 publications

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“…In [6], a thorough study on the major known tiling techniques is shown. In [21], authors use an autotuning method to find the tile sizes, when the outermost loop is parallelised.…”

Section: Related Workmentioning

confidence: 99%

An Analytical Model for Loop Tiling Transformation

Kelefouras

Djemame

Κεραμίδας

et al. 2022

Lecture Notes in Computer Science

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Loop tiling is a well-known loop transformation that enhances data locality in memory hierarchy. In this paper, we initially reveal two important inefficiencies of current analytical loop tiling models and we provide the theoretical background on how current analytical models can address these inefficiencies. To this end, we propose a new analytical model which is more accurate that the existing ones. We showcase, both theoretically and experimentally, that the proposed model can accurately estimate the number of cache misses for every generated tile size and as a result more efficient tile sizes are opted. Our evaluation results provide high cache misses gains and significant performance gains over gcc compiler and Pluto tool on an x86 platform.

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“…In [6], a thorough study on the major known tiling techniques is shown. In [21], authors use an autotuning method to find the tile sizes, when the outermost loop is parallelised.…”

Section: Related Workmentioning

confidence: 99%

An Analytical Model for Loop Tiling Transformation

Kelefouras

Djemame

Κεραμίδας

et al. 2022

Lecture Notes in Computer Science

View full text Add to dashboard Cite

show abstract

“…Pluto [8] is a popular polyhedral code generator including many additional optimizations such as parallelization and register blocking. A comparison of these tools is provided in [13]. The authors in [13] conclude their paper by pointing out that exploiting the target hardware architecture is one of the interesting points remain to be studied.…”

Section: Related Workmentioning

confidence: 99%

“…A comparison of these tools is provided in [13]. The authors in [13] conclude their paper by pointing out that exploiting the target hardware architecture is one of the interesting points remain to be studied.…”

Section: Related Workmentioning

confidence: 99%