An RRAM-based building block for reprogrammable non-uniform sampling ADCs

Abstract

RRAM devices have recently seen wide-spread adoption into applications such as neural networks and storage elements since their inherent non-volatility and multi-bit-capability renders them a possible candidate for mitigating the von-Neumann bottleneck. Researchers often face difficulties when developing edge devices, since dealing with sensors detecting parameters such as humidity or temperature often requires large and power-consuming ADCs. We propose a possible mitigation, namely using a RRAM device in combination with a comparator circuit to form a basic block for threshold detection. This can be expanded towards programmable non-uniform sampling ADCs, significantly reducing both area and power consumption since significantly smaller bit-resolutions are required. We demonstrate how a comparator circuit designed in 130 nm technology can be reprogrammed by programming the incorporated RRAM device. Our proposed building block consumes 83 µW.

Energy-efficient design of quaternary logic gates and arithmetic circuits using hybrid CNTFET-RRAM technology

“…ini The gap ini is varied to provide the necessary resistance changes in HRS and LRS to provide proper functionality of the quaternary circuits. The gap ini of both the RRAM devices in PUN and PDN is 1.8 × 10 −10 m which lies within the suggested range provided by the Stanford model of RRAM [72][73][74]. This gap ini lies in the range which has been used in the literature so taking the legal flexibility of variation of gap ini the amount of current flowing and switching has been controlled likewise by adjusting the chirality and number of tubes in CNTFET to achieve the desired output operation.…”