An RRAM Biasing Parameter Optimizer

Abstract

Abstract-Research on memory devices is a highly active field and many new technologies are being constantly developed. However, characterising them and understanding how to bias for optimal performance is becoming an increasingly tight bottleneck. Here we propose a novel technique for extracting biasing parameters conducive to desirable switching behaviour in a highly automated manner, thereby shortening process development cycles. The principle of operation is based on first: applying variable amplitude, pulse-mode stimulation on a test device in order to induce switching multiple times, next: collecting data on how pulsing parameters affect the device's resistive state and finally: choosing the most suitable biasing parameters for the application at hand. The utility of the proposed technique is validated on T iOx-based prototypes, where we demonstrate the successful extraction of biasing parameters that allow operation of our devices both as multi-state and binary resistive switches.

A memristor random circuit breaker model accounting for stimulus thermal accumulation

“…Because of the relation that higher Áv generates more heat during the same given stress time, it is more likely for a large number of reminding off-state breakers to reach the threshold temperature simultaneously as the pulsing process continues. This accumulation of pulsing effects and the significant acceleration of resistive change by larger voltage have been reported in real TiO 2 -based RRAM device [15,18], which in turn demonstrates the proposed model validity. Fig.…”

A Data-Driven Verilog-A ReRAM Model

“…The result is an estimate of the switching rate function around ( , ). For both routines, measurements are converted into a switching rate ( / ) by dividing with the duration of the stimulus [7].…”

“…Such devices are becoming more and more accessible to researches, and it is now clear that each implementation features properties that render them suitable for different applications. There are memristors that have been reported to switch quickly and in a probabilistic fashion [6], while others can have their resistive state (RS) shifted in small steps (analogue mode) [7] which is ideal for synaptic learning [8].…”

“…low energy and can be compatible with post-CMOS processing. As ReRAM technology matures, a need develops for: a) automated testing routines intended to accelerate the process development cycle [7], [9] and b) robust computer models enabling informed memristor-based system design before committing to silicon. To date, several empirical and semi-empirical models have been published accounting for either only non-volatile [10], [11] or both volatile and non-volatile behaviours [12], [13].…”

Resistive switching of Pt/TiOx/Pt devices fabricated on flexible Parylene-C substrates

“…These applications require higher memory capabilities, which memristors are known to provide. Memristors are also attractive thanks to their intrinsic characteristics of nonvolatile storage, distinct OFF/ON resistive states, either analogue (gradual) or digital (abrupt) switching, along with their promising high memory density capability thanks to their simple structure and potential back-end of line compatibility [6][7][8][9][10][11]. Nevertheless, many challenges still remain before achieving memristor integration into flexible substrates, such as temperature compatibility, surface roughness and materials compatibility.…”