2015 International Symposium on VLSI Technology, Systems and Applications 2015
DOI: 10.1109/vlsi-tsa.2015.7117569
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An ultra-compact and low power neuron based on SOI platform

Abstract: Analog and digital circuit designs have been proposed to mimic the biological neuron in CMOS compatible learning circuits for "brain" like computing. However, the adaptation of such conventional circuit based strategies requires many devices, large areas and hence power consumption. We propose a neuronal device based on the well-investigated impact-ionization based NPN selector on an SOI platform. The neuronal device has a small footprint (225*F 2 ) and low active power (11.5nW/spike) and provides ~10,000x spe… Show more

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Cited by 19 publications
(11 citation statements)
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“…To add the fire and reset, a current threshold I th is set such that when I D exceeds I th , we set V DG = 0 manually. This can be automatically performed by an external circuit as explained earlier 8 . Figure 5(a) shows the reset effect where V DG is set to zero if I ≥ I th = 500 μA manually.…”
Section: Experimental Validationmentioning
confidence: 99%
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“…To add the fire and reset, a current threshold I th is set such that when I D exceeds I th , we set V DG = 0 manually. This can be automatically performed by an external circuit as explained earlier 8 . Figure 5(a) shows the reset effect where V DG is set to zero if I ≥ I th = 500 μA manually.…”
Section: Experimental Validationmentioning
confidence: 99%
“…Second, the technology must be sufficiently matured to enable extreme integration of numerous (~10 11 ) neuron. Recently, our group has proposed a highly power and area efficient neuron on impact ionization based n+/p/n+ diode (I-NPN) device with an extended gate driven by a small reset circuit in a device simulations study 8 . Excellent area (60x) and power improvement (5x) is demonstrated compared to previously reported analog circuits 8 .…”
Section: Introductionmentioning
confidence: 99%
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“…However, complementary metal-oxide semiconductor (CMOS) based neuron circuits for complex neuron functions require many transistors and large capacitors including a membrane capacitor ( C mem ) in a neuron circuit leading to a large area. Therefore, to implement a high density SNN, neuron devices with the integration capability have recently been reported, such as impact-ionization based NPN selector (I-NPN) and NPN device with an extended gate (gated-INPN) on a silicon-on-insulator (SOI) platform ( Ostwal et al, 2015 ; Dutta et al, 2017 ), spin-transfer torque (STT) devices based on a magnetic tunnel junction (MTJ) ( Sharad et al, 2012 ; Zhang et al, 2016 ) and memristor ( Wang et al, 2018 ). However, the neuron circuit based on the SOI devices using the impact-ionization has the body-floated CMOS FETs, and their performance can be degraded by the floating-body effect ( Vandana, 2013 ).…”
Section: Introductionmentioning
confidence: 99%