2011 IEEE 9th International New Circuits and Systems Conference 2011
DOI: 10.1109/newcas.2011.5981248
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An ultra high-speed, mixed-signal emulator for solving power system dynamic equations

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Cited by 3 publications
(6 citation statements)
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“…8). Computation method is a partitioned scheme for solving the DAE with an explicit method of integration [4].…”
Section: A Generalitiesmentioning
confidence: 99%
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“…8). Computation method is a partitioned scheme for solving the DAE with an explicit method of integration [4].…”
Section: A Generalitiesmentioning
confidence: 99%
“…Computation speed of such simulators can be enhanced by means of dedicated hardware architectures. A promising approach based on mixed-signal computation has been developed for addressing this issue [1], [4], [5]. It is based on the so-called phasor emulation (PE) approach [2], [3], [6].…”
Section: Introductionmentioning
confidence: 99%
“…It also contains the ADC and DAC interfaces. The FPGA board provides the configuration of the mixed-signal board and an innovative pipeline architecture computing the load and generator models [4]. A high-speed USB connection is also included on the FPGA board.…”
Section: Nodal Interface Implementation Of the Mixed-signal Phasomentioning
confidence: 99%
“…It creates RC filters with the configurable resistances computing the grid. A full computation time-step includes DA conversion, analog grid computation, AD conversion and digital model computation [4]. This computation scheme takes 1us at each time-step.…”
Section: Rotor Angle [Rad]mentioning
confidence: 99%
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