An Ultra-Low-Power, 16 Bits CT Delta-Sigma Modulator Using 4-Bit Asynchronous SAR Quantizer for Medical Applications

Javahernia, Sahel; Aghdam, Esmaeil Najafi; Torkzadeh, Pooya

doi:10.1142/s0218126620500565

Cited by 3 publications

(2 citation statements)

References 29 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…As digital information technology develops by leaps and bounds, the precision of signal processing in medical, manufacturing, aerospace and other fields is getting higher and higher [1], and the conversion precision also becomes an important parameter in digital signal processing [2]. Sigma-Delta ADC has the characteristics of low power consumption, high accuracy and high linearity.…”

Section: Introductionmentioning

confidence: 99%

Design and Implementation of Sigma-Delta ADC Filter

Wan

Tian

et al. 2022

Electronics

View full text Add to dashboard Cite

This paper presents a digital decimation filter based on a third-order four-bit Sigma-Delta modulator. The digital decimation filter is an important part of the Sigma-Delta ADC and is designed to make the Sigma-Delta ADC (Analog-to-Digital Converter) meets the requirements of Signal-to-Noise Ratio (SNR) not less than 120 dB and Equivalent Number of Bits (ENOB) not less than 20 bits. It adopts a three-stages cascaded structure including a Cascaded Integrator Comb (CIC) decimation filter, a Finite Impulse Response (FIR) compensation filter, and a half-band (HB) filter. This structure effectively reduces about 13% multiplier cells and memory cells. The coefficient symmetry technique and CSD (Canonic Signed Digit) coding technique are used to optimize the parameters of the filter, which further reduces the computational complexity. After optimization, the circuit area is reduced by about 15%, and the logic resources are decreased by about 23%. The Verilog hardware description language is used to describe the behavior of the digital decimation filter, and the simulation is carried out based on the VCS (Verilog Compile Simulator) platform. At the same time, the prototype verification is implemented on the Xilinx Artix-7 series FPGA, and the ADC achieves 113 dB SNR and 18.5 bits ENOB. Finally, the Sigma-Delta ADC is fabricated on SMIC 0.18 μm CMOS process with the layout area of 714.8 μm × 628.4 μm and the power consumption of 11.2 mW. The more tests for the fabricated prototypes will be performed in the future to verify that the Sigma-Delta ADC complies with the design specifications.

show abstract

Section: Introductionmentioning

confidence: 99%

Design and Implementation of Sigma-Delta ADC Filter

Wan

Tian

et al. 2022

Electronics

View full text Add to dashboard Cite

show abstract

“…Though germicidal UV radiation is widely applied for disinfection of water and food, it may also be used to prevent bacterial growth and colonization on surfaces within engineered systems. Emerging UV source technologies, such as ultraviolet-C (UVC) LEDs, present new opportunities for deterring biofilms within certain devices, including medical equipment, food and equipment (Torkzadeh et al 2020). Moreover, UVc radiation increases the reactive oxygen species (ROS) levels in eukaryotic and prokaryotic organisms.…”

Section: Introductionmentioning

confidence: 99%

Untitled

2022

J. New Sci.

View full text Add to dashboard Cite

The biofilm formation and development might vary in presence of UVc radiations, since this biofilm could be considered as a form of adaptation and resistance of microbial organisms to stress exposure. The study of bacterial biofilm was investigated to determine the potential UVc effects on bacterial biofilm formation and development. Moreover, the protective role of superoxide dismutase (SOD) against UVc radiations has been studied in wild-type and mutant strain of Pseudomonas aeruginosa lacking cytosolic Mn-SOD (sodM), Fe-SOD (sodB), or both SODs (sodMB), forming biofilm. Pseudomonas aeruginosa PAO1 and its isogenic mutants sodM, sodB and sodMB were exposed to incremental UVc doses. To measure biofilm formation, samples of suspension were taken at indicated times during irradiation and used for both qualitative and quantitative biofilm tests. Our results showed that inactivation of sodM gene increase the sensitivity of P. aeruginosa toward stress induced by UVc radiations. Furthermore, our results showed an enhancement of biofilm production, after exposure to UVc radiations, in wild-type and sod B mutant which maintained significantly higher levels of biofilm production than sodM mutant strain. The overall results showed that Mn-SOD isoform has a protective role against a stress induced by UVc radiations in P. aeruginosa biofilm.

show abstract

A Low-Distortion Low-Power MASH Architecture ΣΔ Modulator with Double-Sampling

Liu,

Wang,

Fang

et al. 2023

J CIRCUIT SYST COMP

View full text Add to dashboard Cite

This paper presents a low-distortion and low-power multi-stage noise-shaping (MASH) architecture Sigma-Delta ([Formula: see text] modulator with double-sampling. The modulator uses a cascade of integrator feed-forward (CIFF) structure as a cascaded modulator in a MASH architecture. Since the CIFF structure provides a feedforward path from the input signal to the quantizer, the input signal is directly transmitted to the output without loop processing, relaxing the linearity requirement of the modulator, reducing performance requirements for the OTA and harmonic distortion. Double-sampling technique is adopted in the first integrator to double the sampling rate, improving the accuracy of the modulator without the increase of power consumption. In order to eliminate the influence of capacitor mismatch in the sampling network, a fully floating differential switched capacitor (SC) feedback digital-to-analog (DAC) is used in the integrator. The simulation results show that the [Formula: see text] modulator achieves 113[Formula: see text]dB signal-to-noise and distortion ratio (SNDR) and the power consumption is 3.15[Formula: see text]mW from a 5[Formula: see text]V power supply.

show abstract

An Ultra-Low-Power, 16 Bits CT Delta-Sigma Modulator Using 4-Bit Asynchronous SAR Quantizer for Medical Applications

Cited by 3 publications

References 29 publications

Design and Implementation of Sigma-Delta ADC Filter

Design and Implementation of Sigma-Delta ADC Filter

Untitled

A Low-Distortion Low-Power MASH Architecture ΣΔ Modulator with Double-Sampling

Contact Info

Product

Resources

About