An ultra-low voltage self-startup charge pump for energy harvesting applications

Ulaganathan, Chandradevi; Blalock, Benjamin J.; Holleman, Jeremy; Britton, C.L.

doi:10.1109/mwscas.2012.6291993

Cited by 20 publications

(23 citation statements)

References 14 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…5b. These dual-branch structures were introduced to lower ripples in the CTS design (Kleveland, 2002;New et al, 2012) and later evolved into latch-based designs (Nakagome et al, 1991;Gariboldi and Pulvirenti, 1994;1996;Favrat et al, 1998;Pelliconi et al, 2003;Ker et al, 2006;Che et al, 2009;Chen et al, 2010;Ulaganathan et al, 2012;Peng et al, 2014;Kim et al, 2015) which are currently gaining popularity. These structures have V OUT similar to Equation 1 but with reduced charge transfer intervals of T/2 (Palumbo and Pappalardo, 2010), circuit minimization with smaller C PUMP values and half the ripple, V R compared to single branch CPs where V R is expressed as V R = I OUT T/[2(C OUT +C PUMP )] (Pan and Samaddar, 2010) assuming C OUT >> C PUMP .…”

Section: Dual-branch Charge Pumpmentioning

confidence: 99%

“…However, Nakagome et al (1991) CrossLoad CP suffers from low conduction due to gate drive capabilities of PMOS load switches and no gains from series switches when V IN <V TH or when V OUT is minute due to heavy loads (Kim et al, 2015). Recently, literatures in (Favrat et al, 1998;Chen et al, 2010;Ulaganathan et al, 2012;Kim et al, 2015) provide improved versions of this Cross-Load CP (Nakagome et al, 1991) to enhance these constraints associated to LV start-up operations. Fig.…”

Section: Cross-coupled Charge Pumpmentioning

confidence: 99%

“…It employs energy recycling by rerouting charge transfer paths back to the source/load rather than discharging to ground potential. Literatures in (Lauterbach et al, 2000;Keung et al, 2007;Ulaganathan et al, 2012) used adiabatic switching to reduce power usage. Lauterbach et al (2000) uses dualstep adiabatic switching, charge sharing and a simple clocking technique that two-folds power efficiency.…”

Section: Adiabatic Charge Pumpmentioning

confidence: 99%

“…Recently, switching losses linking to CTS gate control is reduced in (Ulaganathan et al, 2012) by using adiabatic switching scheme on the CTS structure (Fig. 8a).…”

Section: Adiabatic Charge Pumpmentioning

confidence: 99%

See 3 more Smart Citations

Review of Charge Pump Topologies for Micro Energy Harvesting Systems

Mi¹,

Islam

Sampe

et al. 2016

American Journal of Applied Sciences

View full text Add to dashboard Cite

This paper reviews CMOS based charge pump topologies used within autonomous embedded micro-systems. These charge pump structures have evolved from its simplistic diode-tied, single-branches with major threshold drops to exponential type, dual-branches with sophisticated gate and substrate control for lower voltage operation. Published charge pumps are grouped based on architecture, operation principles and pump optimization techniques with their pros and cons compared and results contrasted. The various charge pump topologies and schemes used are considered based on pumping efficiency, power efficiency, charge transferability, circuit complexity, pumping capacitors, form factor and minimum supply voltages with an optimum load. This article concludes with an overview of suitable techniques and recommendations that will aid a designer in selecting the most suitable charge pump topology especially for low ambient micro energy harvesting applications.

show abstract

Section: Dual-branch Charge Pumpmentioning

confidence: 99%

Section: Cross-coupled Charge Pumpmentioning

confidence: 99%

Section: Adiabatic Charge Pumpmentioning

confidence: 99%

“…Recently, switching losses linking to CTS gate control is reduced in (Ulaganathan et al, 2012) by using adiabatic switching scheme on the CTS structure (Fig. 8a).…”

Section: Adiabatic Charge Pumpmentioning

confidence: 99%

See 2 more Smart Citations

Review of Charge Pump Topologies for Micro Energy Harvesting Systems

Mi¹,

Islam

Sampe

et al. 2016

American Journal of Applied Sciences

View full text Add to dashboard Cite

show abstract

“…1 [2,[8][9][10][11][12][13][14], series-parallel [15,16] (shown in Fig. 2 and is further discussed in Sect.…”

Section: Introductionmentioning

confidence: 99%

A series–parallel switched capacitor step-up DC–DC converter and its gate-control circuits for over the supply rail switches

Pérez-Nicoli

Castro

Silveira

2015

Analog Integr Circ Sig Process

View full text Add to dashboard Cite

An efficient control of the gate voltage of switches that operate outside the supply range is a problem that occurs in circuits such as step-up DC/DC converters and stimulation circuits for implantable devices. This paper proposes solutions to this problem, using as case study a 3x, ultra low-power, step-up DC/DC converter with seriesparallel architecture. The proposed gate control strategy minimizes the gate swing of the switches and recycles the gate charge in one of the cases, thus reducing the energy spent in driving the switch. The designed converter achieves an 81 % simulated efficiency (including all the required signal generation, except for the feedback loop) at V in ¼ 400 mV and 5 lA load current and operates down to V in ¼ 200 mV.

show abstract