Analog and mixed circuit analysis of nanosheet FET at elevated temperatures

Abstract

In this paper, for the first time, the performance of 3-D Nanosheet FETs (NSFETs) is reported in the inversion (INV), accumulation (ACC), and junctionless (JL) modes at elevated temperatures. The performance comparison is demonstrated at both device and circuit levels. It is observed that, as the temperature increases from 250C to 2000C, a decrement of 68% in mobility is observed for INV mode. In contrast, an increment of around 29% in mobility is observed for ACC and JL modes owing to the less scattering effects. Various crucial DC and analog/RF figures of merit (FOMs),such as SS, DIBL, gm, fT, etc., are assessed for different temperatures in all three modes. Moreover, the impact of temperature on circuit performance is evaluated and compared for all three modes. For the circuit level analysis, look up table-based Verilog-A models are used, and circuit level analysis is carried out using the Cadence tool. From the analyses, at 250C, an increment of around 12% in propagation delay is noticed for the JL and ACC mode inverter compared to the INV mode inverter due to higher ION for INV mode. However,at 2000C, JL inverter outperforms INV and ACC modes because of an increment in mobility. Further, A 3-stage ring oscillator (RO) was designed in all three modes and obtained the oscillation frequencies of 43.39 GHz, 38.9 GHz and 38.8 GHz for INV, ACC and JL mode ROsat 250C,whereas oscillation frequencies of 27.08 GHz, 39.2 GHz and 42.88 GHz are noticed for INV, ACC and JL mode ROs at 2000C respectively. Though JL NSFET offers less intrinsic capacitances, at 250C, the frequency of oscillations (fosc) is high for INV mode because of higher ION. Whereas, at 2000C, the JL mode outperforms due to the absence of mobility degradation with temperature.