Analog and mixed signal modelling with SystemC-AMS

Abstract

SystemC will become more and more important for the design of digital circuits from the specification down to the RT-Level. However complex systems containing also analog components. This paper introduces concepts for the extension of the SystemC methodology for the specification and design of analog and mixed signal systems. The concepts will be illustrated on a telecommunication system including digital hard-and software, analog filter and an analog environment. MotivationSystemC supports a wide range of Models of Computation (MoC) and is very well suited for the design and refinement of HW/SW-systems from functional down to register transfer level. However, for a broad range of applications the digital parts and algorithms interact with analog parts and the continuous-time environment. Due to the complexity of these interactions and the importance of the analog parts in the global system's behavior, it is essential to include the analog parts in the design process of an Analog and Mixed Signal system. Simulation performance is therefore very crucial -especially for the analog parts that usually require more detailed models than the digital parts. Thus, different and specialized analog simulators must be introduced to permit the use of the most efficient simulator for the considered application and level of abstraction. In this paper, we describe a design methodology based on analog and mixed-signal extensions of SystemC, .a.k.a. SystemC-AMS. We also illustrate the methodology with a signal processing dominated application example. SystemC OverviewSystemC is a hardware description language for discrete-time (digital) systems. This language is a subset of the object oriented programming language C++, so SystemC descriptions can be compiled, executed and debugged using standard C++ tools. In comparison to languages like VHDL or Verilog, SystemC supports an arbitrary number of Models of Computation (MoC) which allows an efficient development of executable specifications at high abstraction levels and an order of magnitude faster simulation for abstract models.The SystemC 2.0 [1] methodology combines features of existing HDL's, object oriented techniques and new methodologies for the design and refinement of digital hardware and software systems. This methodology is strongly inspired by the communication model introduced by Gajski [6]. In this methodology, modules, which consists of other modules or algorithms (sequential assignments) implemented in methods, communicates via channels. A set of methods for communication is specified in an interface. These methods are implemented in a channel. Modules can call methods of a channel, and events in a channel can activate methods in a module connected to the channel. This concept is generic enough to describe systems using various models of computation, including static and dynamic multirate dataflow networks, Kahn process networks, communicating sequential processes, and discrete events (the MoC of Verilog and VHDL). We call such systems discrete systems. Prede...

ASDeX: a formal specification for analog circuit enabling a full automated design validation

“…The behavior will be described in an architecture associated to each entity. In [20,21] the possibility of using SystemC-AMS to specify analog and mixed-signal systems is discussed. The component interface will be declared in a SystemC-AMS module (SCA_MODULE).…”

Semantics for model-based validation of continuous/discrete systems

“…These tools may be obtained by extension of existing HDLs [4], [6], [11], [13]. This requires the abandonment of well established efficient tools for the continuous domain (ex.…”

Modeling and Refining Heterogeneous Systems With SystemC-AMS: Application to WSN

“…However, when dealing with WSN containing dozens of nodes, and with a carrier frequency of 2.4 GHz, these frameworks show rapidly their limits in terms of interoperability and simulation performance. One possible solution to the modeling and simulation of "More than Moore" multiprocessor heterogeneous systems [6] is SystemC-AMS [7] [8] [9] [10] [11], an extension to the existing library SystemC [12].…”