Analog Conversion for FPGA Implementation of the TIGER Transmitter using a 14 bit DAC

Abstract

FPGA is a potential medium for DSP implementation of direct conversion transmitters and receivers. However analog interface cannot be ruled out since amplification and other tasks are still in the analog domain. In a previous work, input Gaussian pulses are oversampled and filtering operation is performed to generate TIGER output pulses. A fast DAC with word precision of at least 12 bit can provide the required dynamic range (approx. 72dB) for the system. Analog Devices offer a surface mounted device (SMD) DAC with 14 bit word size and is used in this work to produce the analog signals. An analog reconstruction filter follows the DAC outputs to reduce the digital effects of the sampling clock. In this paper we first describe digital effects of a DAC using a simple tone. The spectral distance in digital sampling components can be increased with a digital interpolation filter. This relaxes constraint on Analog Reconstruction Filter (ARF) which can be realized with a few LC components. Visual HDL and Xilinx Tools are used to derive a digital pulse through the DAC.