Analog fault diagnosis based on ramping power supply current signature clusters

Somayajula, S.A.S.; Sánchez-Sinencio, E.; Gyvez, José Pineda de

doi:10.1109/82.539002

Cited by 50 publications

(31 citation statements)

References 24 publications

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“…Even during its design stage a circuit is simulated under different power supplies, V DD , to assure its functionality in the technology process corners. The use of Multi-V DD and V DD ramping have been also explored as a reliable way of detecting defects in analog and RF circuits [9]- [11]. In this work we will show that performing classical alternate test strategies under multiple power supply conditions has the potential to significantly improve the accuracy of the test results at a low added cost.…”

Section: Theoretical Basismentioning

confidence: 93%

Improving the Accuracy of RF Alternate Test Using Multi-VDD Conditions: Application to Envelope-Based Test of LNAs

Barragán

Fiorelli

Léger

et al. 2011

2011 Asian Test Symposium

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Abstract-This work demonstrates that multi-VDD conditions may be used to improve the accuracy of machine learning models, significantly decreasing the prediction error. The proposed technique has been successfully applied to a previous alternate test strategy for LNAs based on response envelope detection. A prototype has been developed to show its feasibility. The prototype consists of a low-power 2.4GHz LNA and a simple envelope detector, integrated in a 90nm CMOS technology. Postlayout simulation results are provided to verify the functionality of the approach.

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Section: Theoretical Basismentioning

confidence: 93%

Improving the Accuracy of RF Alternate Test Using Multi-VDD Conditions: Application to Envelope-Based Test of LNAs

Barragán

Fiorelli

Léger

et al. 2011

2011 Asian Test Symposium

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show abstract

“…Growing complexity of analogue and mixed-level electronic systems (e.g. system-on-chip -SoC) still rises the bar for testing methods (Baker et al, 1996;Balivada et al, 1996;Chruszczyk et al 2006Chruszczyk et al , 2007, 2009, 2011Chruszczyk 2011;Dali & Souders 1989;Kilic & Zwolinski, 1999;Milne et al, 1997;Milor & Sangiovanni-Vincentelli, 1994;Pecenka et al, 2008;Saab et al 2001;Savir & Guo, 2003;Somayajula et al, 1996).…”

Section: Fault Diagnosis Of Analogue Electronic Circuitsmentioning

confidence: 99%

Wavelet Transform in Fault Diagnosis of Analogue Electronic Circuits

Chruszczyk¹

2012

Advances in Wavelet Theory and Their Applications in Engineering, Physics and Technology

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“…For that purpose a special neural network has been investigated in this paper, called Kohonen or self-organizing map (SOM). However, there are known Kohonen neural network approaches to hard-fault diagnosis of analog circuits based on the observation of the power supply current [36,37]. Another application of SOM has been described in [38] where it tries to diagnose ambiguity groups after classification performed by MLP.…”

Section: Introductionmentioning

confidence: 99%

Soft Fault Clustering in Analog Electronic Circuits with the Use of Self Organizing Neural Network

Grzechca¹

2011

Metrology and Measurement Systems

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The paper presents a methodology for parametric fault clustering in analog electronic circuits with the use of a self-organizing artificial neural network. The method proposed here allows fast and efficient circuit diagnosis on the basis of time and/or frequency response which may lead to higher production yield. A self-organizing map (SOM) has been applied in order to cluster all circuit states into possible separate groups. So, it works as a feature selector and classifier. SOM can be fed by raw data (data comes from the time or frequency response) or some pre-processing is done at first. The author proposes conversion of a circuit response with the use of e.g. gradient and differentiation. The main goal of the SOM is to distribute all single faults on a two-dimensional map without state overlapping. The method is aimed for the development stage because the tolerances of elements are not taken into account, however single but parametric faults are considered. Efficiency analyses of fault clustering have been made on several examples e.g. a Sallen-Key BPF and an ECG amplifier. Testing procedure is performed in time and frequency domains for the Sallen-Key BPF with limited number of test points i.e. it is assumed that only input and output pins are available. A similar procedure has been applied to a real ECG amplifier in the frequency domain. Results prove a high efficiency in acceptable time which makes the method very convenient (easy and quick) as a first test in the development stage.

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Analog fault diagnosis based on ramping power supply current signature clusters

Cited by 50 publications

References 24 publications

Improving the Accuracy of RF Alternate Test Using Multi-VDD Conditions: Application to Envelope-Based Test of LNAs

Improving the Accuracy of RF Alternate Test Using Multi-VDD Conditions: Application to Envelope-Based Test of LNAs

Wavelet Transform in Fault Diagnosis of Analogue Electronic Circuits

Soft Fault Clustering in Analog Electronic Circuits with the Use of Self Organizing Neural Network

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