Analog Memristive Synapse in Spiking Networks Implementing Unsupervised Learning

Abstract

Emerging brain-inspired architectures call for devices that can emulate the functionality of biological synapses in order to implement new efficient computational schemes able to solve ill-posed problems. Various devices and solutions are still under investigation and, in this respect, a challenge is opened to the researchers in the field. Indeed, the optimal candidate is a device able to reproduce the complete functionality of a synapse, i.e., the typical synaptic process underlying learning in biological systems (activity-dependent synaptic plasticity). This implies a device able to change its resistance (synaptic strength, or weight) upon proper electrical stimuli (synaptic activity) and showing several stable resistive states throughout its dynamic range (analog behavior). Moreover, it should be able to perform spike timing dependent plasticity (STDP), an associative homosynaptic plasticity learning rule based on the delay time between the two firing neurons the synapse is connected to. This rule is a fundamental learning protocol in state-of-art networks, because it allows unsupervised learning. Notwithstanding this fact, STDP-based unsupervised learning has been proposed several times mainly for binary synapses rather than multilevel synapses composed of many binary memristors. This paper proposes an HfO2-based analog memristor as a synaptic element which performs STDP within a small spiking neuromorphic network operating unsupervised learning for character recognition. The trained network is able to recognize five characters even in case incomplete or noisy images are displayed and it is robust to a device-to-device variability of up to ±30%.

Low-Power (1T1N) Skyrmionic Synapses for Spiking Neuromorphic Systems

“…The nanodevices when made to follow certain conductance (weight) modulation rules within a connected network lead to equivalent trained neural networks that may be used for T. Bhattacharya different training and inference tasks [5], [6]. Various emerging non-volatile nanodevices are currently being investigated for synaptic applications; Conductive-Bridge Memory (CBRAM) [5], Phase Change Memory (PCM) [7], Magnetic-Tunnel Junction (MTJ) [8], domain walls [9] and oxide based resistive switching memory (OxRAM) [6], [10]. Among emerging spintronic nanodevices, magnetic skyrmions have gained a significant amount of interest owing to their small size, topological stability and ultralow current densities [11], [12].…”

Low‐Conductance and Multilevel CMOS‐Integrated Nanoscale Oxide Memristors

“…[6,17,[20][21][22] Achieving lower memristor conductances lowers the voltage drop on the interconnect wires, allowing lower computing current and larger array sizes. Recently, many reports demonstrated enouraging results using multiple-bits in HfO x , TaO x , and other oxide memristors for neuromorphic computing applications, [23][24][25]31,32] making these highly promising if CMOS-integrated nanoscale devices can be demonstrated wtih wide dynamic range and promising yield numbers.Using memristors, such as oxide and phase change resistive switches, as tunable resistors to construct analog computing hardware accelerators is gaining keen attention. [4] However, existing demonstrations have a narrow dynamic range and achieving multiple low conductance levels is challenging.…”

A hardware friendly unsupervised memristive neural network with weight sharing mechanism

“…For example, TrueNorth-the neuromorphic hardware based on spike-timing prototyped by IBM, has quite low energy consumption for communication [30]. Some state-of-the-art works about MNNs, such as developing an unsupervised network structure with analog memristive synapses [31] and using memristive neural network to build hidden hyperchaotic attractor [32], were also reported. However, complex calculations are still needed in neural networks.…”