2021
DOI: 10.1007/s12633-021-01020-8
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Analog/RF and Power Performance Analysis of an Underlap DG AlGaN/GaN Based High-K Dielectric MOS-HEMT

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Cited by 6 publications
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“…And can be limited by, the minimum channel length imposed by short-channel effects is related to 4 times the thickness width of oxide layer; ii) Limitation arising from decrease in oxide width, with doping levels high in device substrate. With this, there is an increase in junction capacitance and current tunneling and similarly there is a slope of subthreshold current and mobility of the carriers in the device drain [11] terminal, which results in subthreshold volume inversion; iii) Limitation arising from the slope of the subthreshold which allows the device reduce leakage current in the device through driving current [12], which results in lowering the threshold voltage with the falling subthreshold slope in a channelled DG MOSFETs; and iv) Limitation arises as the top gate is conducted and causing the short-channel effect [13]- [15]. The short-channel effects (SCEs) for tri-gate MOSFET can be controlled than in FinFETs making the double-gate design causing the gain of the tri-gate MOSFET device to increase, which causes SCEs to reduce.…”
Section: Introductionmentioning
confidence: 99%
“…And can be limited by, the minimum channel length imposed by short-channel effects is related to 4 times the thickness width of oxide layer; ii) Limitation arising from decrease in oxide width, with doping levels high in device substrate. With this, there is an increase in junction capacitance and current tunneling and similarly there is a slope of subthreshold current and mobility of the carriers in the device drain [11] terminal, which results in subthreshold volume inversion; iii) Limitation arising from the slope of the subthreshold which allows the device reduce leakage current in the device through driving current [12], which results in lowering the threshold voltage with the falling subthreshold slope in a channelled DG MOSFETs; and iv) Limitation arises as the top gate is conducted and causing the short-channel effect [13]- [15]. The short-channel effects (SCEs) for tri-gate MOSFET can be controlled than in FinFETs making the double-gate design causing the gain of the tri-gate MOSFET device to increase, which causes SCEs to reduce.…”
Section: Introductionmentioning
confidence: 99%