Analysis and characterization of inherent application resilience for approximate computing

Chippa, Vinay K.; Chakradhar, Srimat; Roy, Kaushik; Raghunathan, Anand

doi:10.1145/2463209.2488873

Cited by 450 publications

(238 citation statements)

References 15 publications

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“…They operate on noisy data and perform inexact computations. These applications -which range from image processing to recognition and mining applications [10,25] -can tolerate some error in their output values. This allows architects to trade-off data value integrity for better performance and energy savings.…”

Section: Introductionmentioning

confidence: 99%

Load Value Approximation

Miguel

Badr

Jerger

2014

2014 47th Annual IEEE/ACM International Symposium on Microarchitecture

124

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Abstract-Approximate computing explores opportunities that emerge when applications can tolerate error or inexactness. These applications, which range from multimedia processing to machine learning, operate on inherently noisy and imprecise data. We can trade-off some loss in output value integrity for improved processor performance and energyefficiency. As memory accesses consume substantial latency and energy, we explore load value approximation, a microarchitectural technique to learn value patterns and generate approximations for the data. The processor uses these approximate data values to continue executing without incurring the high cost of accessing memory, removing load instructions from the critical path. Load value approximation can also inhibit approximated loads from accessing memory, resulting in energy savings. On a range of PARSEC workloads, we observe up to 28.6% speedup (8.5% on average) and 44.1% energy savings (12.6% on average), while maintaining low output error. By exploiting the approximate nature of applications, we draw closer to the ideal latency and energy of accessing memory.

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Section: Introductionmentioning

confidence: 99%

Load Value Approximation

Miguel

Badr

Jerger

2014

2014 47th Annual IEEE/ACM International Symposium on Microarchitecture

124

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“…And [9] had introduced approximate speculative adders used in the third step of a multiplier. Recently IBM [17], Intel [16], Microsoft [2], [1], [5] and a lot of companies and research groups [20], [3], [15], [18], [26] proposed some effective results on approximate computing. However, most of them are limited to the software applications.…”

Section: Related Workmentioning

confidence: 99%

Hierarchical Synthesis of Approximate Multiplier Design for Field-programmable Gate Arrays (FPGA)-CSRmesh System

Zhang¹,

Yang²,

Wu³

et al. 2018

IJCA

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This paper presents a novel hierarchical synthesis for approximating field-programmable gate array (FPGA) based adders and multipliers. Our proposed work implements the multiplier design with the following contributions: 1) providing four types of single-bit approximate adders to cover a wide range of energy-quality tradeoffs, 2) presenting many approximations of multipliers by employing the single-bit adders, 3) substituting corresponding bits of the approximate multiplier by considering the quality constrains of the results. The novel hierarchical synthesis of the approach has been integrated into our prior project, an FPGA-IoTmesh system in the field of fog computing for hardware acceleration. Combining the merits of reconfigurability of FPGAs and long-distance connection of CSRmesh technology, this work creates a diverse range of applications such as approximate designs at the network edge, as well as showing a demo for Internet-of-Things (IoT) connections covering an entire building.

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“…In approximate computing, the requirement of exact equivalence between the specification and all implementations levels is relaxed in order to reduce power consumption or improve other system parameters such as performance [1], [7].…”

Section: Approximate Computingmentioning

confidence: 99%