A low-power and wideband RF-to-baseband (BB) current-reuse receiver (CRR) front-end utilizing both a 1/f noise cancellation (NC) technique and an active inductor (AI) is proposed tuned to operate from 1 GHz to 1.7 GHz for L-Band applications, including those that require high modulation bandwidths. The CRR front-end employs a single supply and shares the bias current of the low noise transconductance amplifier (LNTA) with the BB circuits to reduce the power consumption. To minimize the losses of the radio frequency (RF) signal right before down-conversion, a high impedance AI circuit isolates the mixer input from the CRR output node. The 1/f NC circuit suppresses the low frequency noise of the LNTA that leaks to the output. A common-gate LNTA with g m -boosting, along with a single-to-differential LC-balun are used to enhance the input matching, conversion gain and noise figure (NF). The proposed receiver is fabricated in a TSMC 130 nm CMOS process and occupies an active area of 0.54mm 2 . The input matching (S 11 ) is below −10 dB from 1 GHz to 1.7 GHz. At a local-oscilator (LO) frequency of 1.3 GHz, intermediate-frequency (IF) of 10 MHz and default current settings, the CRR achieves a conversion gain of 41.5 dB, a doublesideband (DSB) NF of 6.5 dB, and an IIP3 of −28.2 dBm while consuming 1.66 mA from a 1.2 V supply. 14 15 employed a current-reuse baseband amplifier in a mixer-first 54 receiver architecture. It achieves very good performance con-55 suming a low-power of 0.38 mW. However, the receiver 56 architecture is not suitable for wideband modulations as it 57 reports a very low baseband bandwidth of 2 MHz that is 58 not suitable for wider modulation bandwidth applications. 59 In [11], a quadrature low noise amplifier (LNA) and active-60 type poly-phase filter (PPF) were used to reduce power con-61 sumption. However, the receiver has a narrow RF bandwidth 62 due to the common-source LNA topology, and high NF 63 because of the quadrature technique used in the LNA. In [12], 64 alternatively, an inverter-based LNA with an LC-balun and 65 passive PPF are used to generate the quadrature signal before 66 the down conversion. This reduces the LO dynamic power 67 for Bluetooth low-energy (BLE), but using an LC-balun and 68 passive PPF is not suitable for wideband applications. In addi-69 tion, a phase-locked loop (PLL) free receiver architecture is 70 proposed in [13] at the cost of a high NF. 71 Recently, current sharing of RF and BB blocks using a sin-72 gle supply voltage has been actively studied. Conventionally, 73 receiver front-ends cascade circuits to receive and amplify a 74 weak RF signal with a LNTA, down-convert it to BB through 75 a mixer and finally convert the current signal to a voltage 76 signal using a transimpedance amplifier (TIA), as shown 77 in Fig. 1. On the other hand, by scaling down the CMOS 78 technology node where the voltage threshold is reduced and 79 transition frequency (f T ) is increased, stacked architectures 80 that reduce power consumption by sharing the current of the 81 RF ci...
