Analysis and Design of 8-to-101.6-GHz Injection-Locked Frequency Divider by Five With Concurrent Dual-Path Multi-Injection Topology

Garghetti, Alessandro; Lacaita, A.L.; Seebacher, David; Bassi, Matteo; Levantino, Salvatore

doi:10.1109/jssc.2021.3134486

Cited by 5 publications

(2 citation statements)

References 38 publications

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“…LC-oscillator-based ILFDs (LC-ILFD) offer a better noise performance but are limited by a narrow bandwidth [38]. Ring-oscillator-based ILFDs (RO-ILFD) feature a higher bandwidth but in return a higher phase noise [37]. Since ILFDs are narrow-band and mostly not programmable, their application range is strongly limited.…”

Section: Transient Behaviormentioning

confidence: 99%

Design and Phase Noise Measurements of an Ultrafast Dual-Modulus Prescaler in 130 nm SiGe:C BiCMOS

Polzin,

van Delden,

Pohl

et al. 2024

IEEE Trans. Microwave Theory Techn.

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The design complexity of high-speed and powerefficient circuits increases to higher operation frequencies. Therefore, this manuscript gives an overview of how to design and optimize fully differential emitter-coupled logic (ECL) gates using two dual-modulus prescalers with switchable division ratios of 4 and 5. The first prescaler is optimized to the highest operation frequencies, up to 142 GHz and even 166 GHz for the division ratios of 5 and 4, respectively. Furthermore, another prescaler has been optimized for the widely used 80 GHz band, which has been heavily promoted by the automotive industry and has a high number of components in that domain. Both prescalers can be utilized in a fully programmable frequency divider with a wide division ratio range. As the measurement of the additive phase noise for frequency-converting devices with excellent noise performance is quite challenging, this is discussed theoretically and carried out practically. The measured jitter is between 500 as and 1.9 fs within integration limits of 100 Hz up to 1 MHz offset frequency.

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Section: Transient Behaviormentioning

confidence: 99%

Design and Phase Noise Measurements of an Ultrafast Dual-Modulus Prescaler in 130 nm SiGe:C BiCMOS

Polzin,

van Delden,

Pohl

et al. 2024

IEEE Trans. Microwave Theory Techn.

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“…A Ring ILFD can achieve high-division-ratio operation with the harmonic-signal mixing technique [25], [26], [27]. However, the locking range is limited because undesired harmonic signals will interfere with the oscillator's injection locking.…”

Section: B Transformer-based Injection-enhanced Ilfdmentioning

confidence: 99%

A 37–43.5-GHz Phase and Amplitude Detection Circuit With 0.049° and 0.036-dB Accuracy for 5G Phased-Array Calibration Using Transformer-Based Injection-Enhanced ILFD

Yamazaki

Sakamaki

Pang

et al. 2023

IEEE J. Solid-State Circuits

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This article introduces a high-accuracy phase and amplitude detection circuit for 5G phased-array calibration. By utilizing a 39 GHz-150 kHz down-conversion scheme, the phase and amplitude information are detected separately with a phase-to-digital converter (PDC) and an analogto-digital converter (ADC). In addition, to reduce the number of reference signals, a divide-by-4 injection-locked frequency divider (ILFD) using a transformer-based injection-enhancing technique is implemented for wideband reference signal generation. This ILFD realizes a wide locking range of 16.3-23.4 GHz (35.8%) with 5.05-mW power consumption. The detection circuit achieves less than 0.049 • and 0.036-dB detection rms errors at 39 GHz. The wideband high-accuracy detection is also achieved from 37 to 43.5 GHz. The total power consumption is 50 mW with a 1-V VDD. The total core area is 1.43 mm 2 in a 65-nm CMOS process.

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A 1.8-67GHz Divide-by-4 ILFD Using Area-Efficient Transformer-Based Injection-Enhancing Technique

Yamazaki

Pang

Shirane

et al. 2022

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)

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Analysis and Design of 8-to-101.6-GHz Injection-Locked Frequency Divider by Five With Concurrent Dual-Path Multi-Injection Topology

Cited by 5 publications

References 38 publications

Design and Phase Noise Measurements of an Ultrafast Dual-Modulus Prescaler in 130 nm SiGe:C BiCMOS

Design and Phase Noise Measurements of an Ultrafast Dual-Modulus Prescaler in 130 nm SiGe:C BiCMOS

A 37–43.5-GHz Phase and Amplitude Detection Circuit With 0.049° and 0.036-dB Accuracy for 5G Phased-Array Calibration Using Transformer-Based Injection-Enhanced ILFD

A 1.8-67GHz Divide-by-4 ILFD Using Area-Efficient Transformer-Based Injection-Enhancing Technique

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