Analysis and design of HBT Cherry-Hooper amplifiers with emitter-follower feedback for optical communications

Holdenried, C.D.; Haslett, J.W.; Lynch, Michael W.

doi:10.1109/jssc.2004.835819

Cited by 75 publications

(25 citation statements)

References 9 publications

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“…5 for different input peak-to-peak voltages and compares the results against the frequency response of an ideal amplifier with finite bandwidth and linear phase characteristic. As the Cherry-Hooper amplifiers and output drivers approximately behave like second-order systems (Holdenried et al, 2004) each, the limiting amplifier in Sect. 2 is modelled with an 8th order system.…”

Section: Simulation Resultsmentioning

confidence: 99%

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Design of a 0.13 µm SiGe Limiting Amplifier with 14.6 THz Gain-Bandwidth-Product

Park

Berroth

2017

Adv. Radio Sci.

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Abstract. This paper presents the design of a limiting amplifier with 1-to-3 fan-out implementation in a 0.13 µm SiGe BiCMOS technology and gives a detailed guideline to determine the circuit parameters of the amplifier for optimum high-frequency performance based on simplified gain estimations. The proposed design uses a Cherry-Hooper topology for bandwidth enhancement and is optimized for maximum group delay flatness to minimize phase distortion of the input signal. With regard to a high integration density and a small chip area, the design employs no passive inductors which might be used to boost the circuit bandwidth with inductive peaking. On a RLC-extracted post-layout simulation level, the limiting amplifier exhibits a gain-bandwidthproduct of 14.6 THz with 56.6 dB voltage gain and 21.5 GHz 3 dB bandwidth at a peak-to-peak input voltage of 1.5 mV. The group delay variation within the 3 dB bandwidth is less than 0.5 ps and the power dissipation at a power supply voltage of 3 V including output drivers is 837 mW.

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Section: Simulation Resultsmentioning

confidence: 99%

“…bandwidth, group delay, etc.) depending on the chosen circuit parameters (Holdenried et al, 2004). The difference in frequency behaviour can be significant and is explained in the later course of this paper with more detail.…”

Section: Design Considerationsmentioning

confidence: 95%

Design of a 0.13 µm SiGe Limiting Amplifier with 14.6 THz Gain-Bandwidth-Product

Park

Berroth

2017

Adv. Radio Sci.

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“…An advantage of the configuration shown in Figure 3 is that R 2 can be adjusted in order to increase the output voltage swing without considerably affecting the bandwidth, gain and overshoot of the comparator (Holdenried et al, 2004). From (1), it is clear that the emitter resistance reduces the gain of the amplifier.…”

Section: Cherry Hooper Comparatormentioning

confidence: 99%

“…The Cherry Hooper (C-H) amplifier is commonly used as a limiting amplifier for high-speed signals, exhibiting large gain and bandwidth (Razavi, 2003;Holdenried et al, 2004). The C-H configuration was consequently selected to operate as a comparator in a flash ADC.…”

Section: Introductionmentioning

confidence: 99%

High-speed Cherry Hooper flash analog-to-digital converter

Fauré

Sinha

2017

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Purpose -The 60 GHz unlicensed band is being utilized for high speed wireless networks with data rates in the gigabit range. In order to successfully make use of these high speed signals in a digital system, a high speed analog-to-digital converter (ADC) is required. This paper presents the use of a common collector (CC) input tree and Cherry Hooper differential amplifier to enable analog-to-digital conversion at high frequencies. Approach -The CC input tree is designed to separate the input Miller capacitance of each comparator stage. The CC stages are biased to obtain bandwidth speeds higher than the comparator stages while using less current than the comparator stages. The Cherry Hooper differential amplifier is modified to accommodate the low breakdown voltages of the technology node and used as a comparator. The comparator stages are biased to obtain a high output voltage swing and have a small signal bandwidth up to 29 GHz. Simulations were performed using foundry development kits to verify circuit operation. A two-bit ADC was prototyped in IBM's 130 nm silicon-germanium (SiGe) bipolar complementary metal-oxide-semiconductor (BiCMOS) 8HP technology node. Measurements were carried out on test printed circuit boards (PCBs) and compared with simulation results. Findings -The use of the added CC input tree showed a simulated bandwidth improvement of approximately 3.23 times when compared to a basic flash architecture for a two-bit ADC. Measured results showed an effective number of bits (ENOB) of 1.18, from DC up to 2 GHz, whereas the simulated result was 1.5. The maximum measured integral non-linearity (INL) and differential nonlinearity (DNL) was 0.33 least significant bits (LSBs). The prototype ADC had a figure of merit of 42 pJ/sample. Originality/value -The prototype ADC results showed that the group delay for the Cherry Hooper comparator plays a critical role in ADC performance for high frequency input signals. For minimal component variation the group delay between channels deviate from each other, causing incorrect output codes. The prototype ADC had a low gain which reduced the comparator performance. The two-bit CC Cherry Hooper ADC is capable of achieving an ENOB close to 1.18 for frequencies up to 2 GHz, with 180 mW total power consumption.

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“…Simplified schematic of the wide-bandwidth THA A. A Large bandwidth SEF structure A large bandwidth double stage SEF presented in [3] is used to design the THA core in order to improve the THA isolation. Indeed, the isolation is 20 dB better for the SEF with a second linearity up to 15 GHz, a THD of -38.7 dB and -30.1 dB are switch stage.…”

Section: Circuit Designmentioning

confidence: 99%

A 60 GSa/s InP-DHBT-THA with 50 GHz Bandwidth for High Bit Rate Communication Systems

Deza

Ouslimani

Konczykowska

et al. 2013

Proceedings of the 2nd International Symposium on Computer, Communication, Control and Automation

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-A 60 GSa/s THA is designed and realized in InP-DHBT process. The THA presents a small signal bandwidth of 50 GHz. For +4 dBm and -4 dBm input powers, 60 GSa/s spectral measurements give a THD of -37.3 dB and -51.3 dB for input frequency up to 2 GHz and a THD of -30.1 dB and -38.7 dB up to 15 GHz. Temporal measurement illustrates the THA operation for a 2 GHz sinusoid input signal sampled at 60 GHz.

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Analysis and design of HBT Cherry-Hooper amplifiers with emitter-follower feedback for optical communications

Cited by 75 publications

References 9 publications

Design of a 0.13 µm SiGe Limiting Amplifier with 14.6 THz Gain-Bandwidth-Product

Design of a 0.13 µm SiGe Limiting Amplifier with 14.6 THz Gain-Bandwidth-Product

High-speed Cherry Hooper flash analog-to-digital converter

A 60 GSa/s InP-DHBT-THA with 50 GHz Bandwidth for High Bit Rate Communication Systems

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Analysis and design of HBT Cherry-Hooper amplifiers with emitter-follower feedback for optical communications

Cited by 75 publications

References 9 publications

Design of a 0.13 µm SiGe Limiting Amplifier with 14.6 THz Gain-Bandwidth-Product

Design of a 0.13 µm SiGe Limiting Amplifier with 14.6 THz Gain-Bandwidth-Product

High-speed Cherry Hooper flash analog-to-digital converter

A 60 GSa/s InP-DHBT-THA with 50 GHz Bandwidth for High Bit Rate Communication Systems

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Product

Resources

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Design of a 0.13 µm SiGe Limiting Amplifier with 14.6 THz Gain-Bandwidth-Product

Design of a 0.13 µm SiGe Limiting Amplifier with 14.6 THz Gain-Bandwidth-Product