This paper develops a simple design of unit cells to be taken in use in series-connected multilevel inverters. The proposed structure not only reduces the part counts efficiently but also increases the number of generated levels in the output voltage. By aggregating the cascaded series-connected units as the basic module, the proposed structure follows one H-bridge circuit. The basic module acts as the initial stage in direct current/alternative current conversion within which all the positive and zero levels are produced. Afterwards, the H-bridge circuit affords the production of symmetric sine-wave by realizing negative levels.To assure the expected operational objectives, we developed three different algorithms to determine the magnitude of input direct current voltage sources. Moreover, to further investigate the proposed structure, different switching algorithms such the fundamental switching frequency and pulse width modulation level shifting approaches are implemented and compared with each other. Extensive numerical and experimental studies are conducted to yield in a suitable evaluation platform. The obtained results demonstrate a superior performance of the proposed structure rather than the conventional topologies.depreciate the satisfactory performance of the proposed structure for low levels output voltages. For these cases, the THD content increases. This point is easily recognized in Figure 22. However, by increasing the number of levels, we obtained a more sinusoidal and clean waveform. Thus, a higher service quality is guaranteed. This in turn increases the count of power electronics devices and Figure 18. Experimental results for the proposed nine-level structure. (a) Basic module voltage (V o1 + V o2 ), (Time/div = 5 ms), and (Voltage/div = 2 V by 1:10 probe). (b) Sinusoidal output voltage waveform. (c) Output current waveform. [Colour figure can be viewed at wileyonlinelibrary.com]