Analysis and evaluation of greedy thread swapping based dynamic power management for MPSoC platforms

Abstract

Abstract-Thread migration (TM) is a recently proposed dynamic power management technique for heterogeneous multi-processor system-on-chip (MPSoC) platforms that eliminates the area and power overheads incurred by fine-grained dynamic voltage and frequency scaling (DVFS) based power management. In this paper, we take the first step towards formally analyzing and experimentally evaluating the use of power-aware TM for parallel data streaming applications on MPSoC platforms. From an analysis perspective, we characterize the optimal mapping of threads to cores and prove the convergence properties of a complexity effective greedy thread swapping based TM algorithm to the globally optimal solution. The proposed techniques are evaluated on a 9-core FPGA based MPSoC prototype equipped with fully-functional TM and DVFS support, and running a parallelized video encoding benchmark based on the Motion Picture Experts Group (MPEG-2) standard. Our experimental results validate the proposed theoretical analysis, and show that the proposed TM algorithm provides within 8% of the DVFS performance under the same power budget, and assuming no overheads for DVFS. Assuming voltage regulator inefficiency of 80%, the proposed TM algorithm has 9% higher performance than DVFS, again under the same total power budget.

An all-digital self-calibrated delay-line based temperature sensor for VLSI thermal sensing and management

“…The voltage and process information provided by the other two sensors can compensate for the readings of the temperature sensor and vice versa. Finally, further improvements in the thermal behavior could be achieved if a more efficient thread migration algorithm [36] or Dynamic Voltage Scaling (DVS) could be used (DVS is not studied in this paper, as there is no provision to change the power supply level of the Cyclone IV FPGA chip on the development printed circuit board). 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 …”

Energy-Efficient Application Mapping and Scheduling for Lifetime Guaranteed MPSoCs

“…Unlike the static frequency assignment with fixed operating frequency at all time, the dynamic case that varies the frequencies and voltages gains a better performance and increases the energy efficiency. We assume that the processor cores are architecturally identical and the only source of heterogeneity is that the processors can operate at different voltage and frequency levels, as assumed in [21], [22].…”