Analysis and implementation of the IEC 61131-3 software model under POSIX Real-Time operating systems

Plaza, Inmaculada; Medrano, Carlos; Blesa, Alfonso

doi:10.1016/j.micpro.2006.06.001

Cited by 15 publications

(4 citation statements)

References 4 publications

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“…They also pointed out the ambiguity that NOT and MOD keyword may be interpreted either as a standard function name or as an operator. I. Plaza and C. Medrano [8] pointed out the fact that although the standard allows the declaration of global variable in programs, the formal syntax definition in standard does not allow the same. They also identified that there are two possible ways of parsing the 1 and 0 literals either as a boolean literal or as an integer literal.…”

Section: Related Workmentioning

confidence: 99%

A structured text to MISRA-C translator and issues with IEC 61131-3 standard

Kabra

Karmakar

Patil

2012

Proceedings of 2012 IEEE 17th International Conference on Emerging Technologies &Amp; Factory Automation (ETFA 2012)

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Programmable Controllers (PLC) are being increasingly used in control systems for Nuclear Power Plants.A PLC, qualified for safety applications, is attractive because it saves a lot of time in verification and validation effort as compared to development of embedded control systems. We developed a tool, ST to MISRA-C translator, required for developing application program using Structured Text (ST) in a qualified PLC. The syntax and semantics of ST programming language is defined in the IEC 61131-3 standard. During the development of the translator, we found some issues with ST language syntax and semantics not pointed out by other researchers. These issues are discussed in this paper along with proposed changes in the ST language grammar for its unambiguous parsing.

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Section: Related Workmentioning

confidence: 99%

A structured text to MISRA-C translator and issues with IEC 61131-3 standard

Kabra

Karmakar

Patil

2012

Proceedings of 2012 IEEE 17th International Conference on Emerging Technologies &Amp; Factory Automation (ETFA 2012)

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“…The associated translator has been built [12]. It is divided into two parts, the front-end that outputs an intermediate language and the back-end that takes this intermediate language and gives the final C-code.…”

Section: Ada As a Target Language For Plc Implementationmentioning

confidence: 99%

Exceptions in a Programmable Logic Controller implementation based on ADA

Plaza

Medrano

2007

Computers in Industry

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“…Unfortunately, the standard is not precise. It requires many amendments and comments [2][3][4]. Nevertheless, the provisions of the standard are implemented in industrial PLCs and in experimental or academic structures.…”

Section: Introductionmentioning

confidence: 99%

FPGA Implementation of IEC 61131-3-Based Hardware-Aided Timers for Programmable Logic Controllers

Chmiel,

Czerwinski,

Malcher

2023

Electronics

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Designs of timer function blocks (FBs) are presented in the article. The developed modules are IEC 61131-3. An analysis of IEC 61131-3 in terms of timer functionality and implementation options is presented. Three types are presented, timer-on, timer-off, and timer-pulse, with each type designed to be fully hardware or software-like. Both designs, hardware or software-like, can operate as multi-channel timers. Particularly noteworthy is the software-like design, for which a solution without edge detectors was achieved. Such a feature was obtained by reversing the method of time determination by counting the difference between the start and end times and by using specific features of the D flip-flops, that is, clock-enable inputs. The presented timers were written in Verilog language and implemented in an FPGA chip. Thanks to the universal design of the interface, the proposed FBs can be used for the hardware support of existing programmable logic controllers (PLCs) or as an integral part of newly built PLC CPUs. The idea of a CPU architecture with hardware support is proposed. The paper presents the results of the implementation in an FPGA of the Kintex UltraScale+ family from AMD-Xilinx.

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Analysis and implementation of the IEC 61131-3 software model under POSIX Real-Time operating systems

Cited by 15 publications

References 4 publications

A structured text to MISRA-C translator and issues with IEC 61131-3 standard

A structured text to MISRA-C translator and issues with IEC 61131-3 standard

Exceptions in a Programmable Logic Controller implementation based on ADA

FPGA Implementation of IEC 61131-3-Based Hardware-Aided Timers for Programmable Logic Controllers

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