Analysis and Optimization of Financial Analytics Benchmark on Modern Multi- and Many-core IA-Based Architectures

Smelyanskiy, Mikhail; Sewall, Jason; Kalamkar, Dhiraj D.; Satish, Nadathur; Dubey, Pradeep; Astafiev, Nikita; Burylov, Ilya; Николаев, А. В.; Maidanov, Sergey; Li, Shuo; Kulkarni, Sunil; Finan, Charles H.

doi:10.1109/sc.companion.2012.139

Cited by 13 publications

(5 citation statements)

References 7 publications

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“…More details about the advantages and disadvantages of each memory pattern for the option pricing problem are presented in [2]. Here we only want to point out that while SoA has given quite a significant speedup over AoS for the Black-Scholes code several years ago [2,4], now the difference has been disappeared. The AoS pattern works even a little faster than SoA on hardware described in Section 3.…”

Section: Baselinementioning

confidence: 99%

“…Firstly, it is one of the basic elements of financial market analysis and, therefore, has a great practical interest. Secondly, ease of understanding and implementation, combined with high computational requirements, make the Black-Scholes model popular for learning the basics of optimization and performance testing on different architectures, including various accelerators such as GPU, Xeon Phi, and others [2,3,4,5,6]. In this paper, we consider the Black-Scholes formula for a fair price of a European call option and employ several optimization techniques to improve performance on CPUs and GPUs.…”

Section: Introductionmentioning

confidence: 99%

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Black-Scholes Option Pricing on Intel CPUs and GPUs: Implementation on SYCL and Optimization Techniques

Panova¹,

Volokitin²,

Anton³

et al. 2022

Preprint

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The Black-Scholes option pricing problem is one of the widely used financial benchmarks. We explore the possibility of developing a high-performance portable code using the SYCL (Data Parallel C++) programming language. We start from a C++ code parallelized with OpenMP and show optimization techniques that are beneficial on modern Intel Xeon CPUs. Then, we port the code to SYCL and consider important optimization aspects on CPUs and GPUs (device-friendly memory access patterns, relevant data management, employing vector data types). We show that the developed SYCL code is only 10% inferior to the optimized C++ code when running on CPUs while achieving reasonable performance on Intel GPUs. We hope that our experience of developing and optimizing the code on SYCL can be useful to other researchers who plan to port their high-performance C++ codes to SYCL to get all the benefits of single-source programming.

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Section: Baselinementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Black-Scholes Option Pricing on Intel CPUs and GPUs: Implementation on SYCL and Optimization Techniques

Panova¹,

Volokitin²,

Anton³

et al. 2022

Preprint

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“…Several studies have been published that discuss porting existing applications to the Phi by relying on higher-level language features, usually compiler autovectorization, and have shown success in the fields of structured grid computations [19,3] molecular dynamics [23,16] and finance [21]. While most of the computations in these applications were engineered to lend themselves easily to auto-vectorization due to the structure of the underlying problems, the use of low level vector programming was still required in many cases.…”

Section: Introductionmentioning

confidence: 99%

“…However, it requires very explicit programming techniques specific to the hardware to gain maximum performance.It has been shown that very low level assembly implementations of algorithms can deliver performance on the Xeon Phi, usually as part of software packages such as MKL [7] or Linpack [8]. Several studies have been published, which discuss porting existing applications to the Phi by relying on higher-level language features, usually compiler auto-vectorization, and have shown success in the fields of structured grid computations [9, 10], molecular dynamics [11,12], and finance [13]. Most of the computations in these applications were engineered to lend themselves easily to autovectorization because of the structure of the underlying problems.…”

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confidence: 99%

Vectorizing unstructured mesh computations for many‐core architectures

Reguly

Laszlo

Mudalige

et al. 2015

Concurrency and Computation

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Achieving optimal performance on the latest multi-core and many-core architectures depends more and more on making efficient use of the hardware's vector processing capabilities. While auto-vectorizing compilers do not require the use of vector processing constructs, they are only effective on a few classes of applications with regular memory access and computational patterns. Irregular application classes require the explicit use of parallel programming models; CUDA and OpenCL are well established for programming GPUs, but it is not obvious what model to use to exploit vector units on architectures such as CPUs or the Xeon Phi. Therefore it is of growing interest what programming models are available, such as Single Instruction Multiple Threads (SIMT) or Single Instruction Multiple Data (SIMD), and how they map to vector units. This paper presents results on achieving high performance through vectorization on CPUs and the Xeon Phi on a key class of applications: unstructured mesh computations. By exploring the SIMT and SIMD execution and parallel programming models, we show how abstract unstructured grid computations map to OpenCL or vector intrinsics through the use of code generation techniques, and how these in turn utilize the hardware.We benchmark a number of systems, including Intel Xeon CPUs and the Intel Xeon Phi, using an industrially representative CFD application and compare the results against previous work on CPUs and NVIDIA GPUs to provide a contrasting comparison of what could be achieved on current many-core systems. By carrying out a performance analysis study, we identify key performance bottlenecks due to computational, control and bandwidth limitations.We show that the OpenCL SIMT model does not map efficiently to CPU vector units due to auto-vectorization issues and threading overheads. We demonstrate that while the use of SIMD vector intrinsics imposes some restrictions, and requires more involved programming techniques, it does result in efficient code and near-optimal performance, that Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. is up to 2 times faster than the non-vectorized code. We observe that the Xeon Phi does not provide good performance for this class of applications, but is still on par with a pair of high-end Xeon chips. CPUs and GPUs do saturate the available resources, giving performance very near to the optimum.

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“…Much of their work has been focusing on pricing a large number of plain vanilla contracts simultaneously with impressive speedup. [1] While these results are indeed useful and help many common financial applications at-large, there are also practical needs to accelerate pricing one complicated contract using the same many-core programming techniques.…”

Section: Introductionmentioning

confidence: 99%

Accelerating Asian option pricing on many‐core architectures

Lin²

2015

Concurrency and Computation

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SUMMARYIn this paper, we start by looking at the algorithms and the numerical methods of pricing one exotic option, the strong path dependent Asian option using the Black-Scholes pricing model. We cover both geometric average and arithmetic average schemes that lead us to two different numerical solutions. Next, we discuss how to implement these algorithms on the leading many-core architectures with contrasting programming models and still achieve the comparable performance results. As an example, we will show that a 2-year contract with 252 times steps and 1,000,000 samples can be priced in approximately one fifth of a second on two leading many-core architectures. The purpose of this paper is to understand what is required to accelerate the numerical-intensive algorithms such as the Asian option pricing algorithm in quantitative and how to take advantage of the parallel programming features on many-core architecture and express parallelism inherent in the similar algorithms in quantitative finance.

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Analysis and Optimization of Financial Analytics Benchmark on Modern Multi- and Many-core IA-Based Architectures

Cited by 13 publications

References 7 publications

Black-Scholes Option Pricing on Intel CPUs and GPUs: Implementation on SYCL and Optimization Techniques

Black-Scholes Option Pricing on Intel CPUs and GPUs: Implementation on SYCL and Optimization Techniques

Vectorizing unstructured mesh computations for many‐core architectures

Accelerating Asian option pricing on many‐core architectures

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