2020 57th ACM/IEEE Design Automation Conference (DAC) 2020
DOI: 10.1109/dac18072.2020.9218718
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Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency

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Cited by 11 publications
(1 citation statement)
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“…RapidStream (in 𝑆 2 ) also adopts the iterative partitioning floorplan algorithm. AutoBridge and other works that co-optimize physical design process and HLS compilation [14,29,57,[75][76][77] rely on the conventional RTL-to-bitstream tool chain.…”
Section: Related Workmentioning
confidence: 99%
“…RapidStream (in 𝑆 2 ) also adopts the iterative partitioning floorplan algorithm. AutoBridge and other works that co-optimize physical design process and HLS compilation [14,29,57,[75][76][77] rely on the conventional RTL-to-bitstream tool chain.…”
Section: Related Workmentioning
confidence: 99%