Analysis and Simulation of a Mixed-Mode Neuron Architecture for Sensor Conditioning

Zatorre-Navarro, G.; Marques, Nicolas; Celma-Pueyo, S.

doi:10.1109/tnn.2006.877535

Cited by 17 publications

(5 citation statements)

References 5 publications

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“…While a single-ended circuit is shown for simplicity, a fully differential architecture is used for each neuron. Compared to existing analog implementations which need 11-15 transistors for piece-wise approximation of ideal activation functions [26][27][28][29] , the proposed approach reduces transistor count, and hence, area. The proposed activation circuits use transistors biased in saturation region to minimize mismatch and noise.…”

Section: Pre-processing and Feature Extractionmentioning

confidence: 99%

Fusion of Fully Integrated Analog Machine Learning Classifier with Electronic Medical Records for Real-Time Prediction of Sepsis Onset

Sadasivuni

Saha

Banerjee

et al. 2021

Preprint

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The objective of this work is to develop a fusion artificial intelligence (AI) model that combines patient electronic medical record (EMR) and physiological sensor data to accurately predict early risk of sepsis. The fusion AI model has two components - an on-chip AI model that continuously analyzes patient electrocardiogram (ECG) data and a cloud AI model that combines EMR and prediction scores from on-chip AI model to predict fusion sepsis onset score. The on-chip AI model is designed using analog circuits for sepsis prediction with high energy efficiency for integration with resource constrained wearable device. Combination of EMR and sensor physiological data improves prediction performance compared to EMR or physiological data alone, and the late fusion model has an accuracy of 93% in predicting sepsis 4 hours before onset. The key differentiation of this work over existing sepsis prediction literature is the use of single modality patient vital (ECG) and simple demographic information, instead of comprehensive laboratory test results and multiple vital signs. Such simple configuration and high accuracy makes our solution favorable for real-time, at-home use for self-monitoring.

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Section: Pre-processing and Feature Extractionmentioning

confidence: 99%

Fusion of Fully Integrated Analog Machine Learning Classifier with Electronic Medical Records for Real-Time Prediction of Sepsis Onset

Sadasivuni

Saha

Banerjee

et al. 2021

Preprint

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“…Most of them are designed to generate a response similar to a sigmoid or a tanh function. However, most of the designs lack of symmetry and the saturation levels are not well defined [21], [22], whereas other circuits show a pretty complex implementations with large area and high power consumption [23]. It is worth mentioning that despite the potential of the ReLU non-linear function in ML based implementations, this function is really efficient for deep learning neural architectures where layers with a high number of processors are required, and where the overall performance will not be affected if some neurons turnoff due to the well known dying ReLU problem.…”

Section: B Non-linear Activation Function Circuitmentioning

confidence: 99%

“…From the different machine learning based architectures designed for function approximation, multilayer perceptron (MLP) features make it a worthy candidate for use in sensor signal processing. The reduced set of arithmetic operations performed by these processors make them suitable to be implemented in small application-specific circuits [23]. A typical MLP diagram based on this architecture is shown in Figure 11.…”

Section: Selection Of Machine Learning Architecture For Sensor Condit...mentioning

confidence: 99%

Microelectronic CMOS Implementation of a Machine Learning Technique for Sensor Calibration

et al. 2020

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An integrated machine-learning based adaptive circuit for sensor calibration implemented in standard 0.18µm CMOS technology with 1.8V power supply is presented in this paper. In addition to linearizing the device response, the proposed system is also capable to correct offset and gain errors. The building blocks conforming the adaptive system are designed and experimentally characterized to generate numerical high-level models which are used to verify the proper performance of each analog block within a defined multilayer perceptron architecture. The network weights, obtained from the learning phase, are stored in a microcontroller EEPROM memory, and then loaded into each of the registers of the proposed integrated prototype. In order to verify the proposed system performance, the non-linear characteristic of a thermistor is compensated as an application example, achieving a relative error e r below 3% within an input span of 130 • C, which is almost 6 times less than the uncorrected response. The power consumption of the whole system is 1.4mW and it has an active area of 0.86mm 2 . The digital programmability of the network weights provides flexibility when a sensor change is required.INDEX TERMS Adaptive signal processing, artificial neural networks, CMOS, sensor conditioning.

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“…The ANNA chip can be used for a wide variety of neural network architectures but is optimized for locally connected weightsharing networks and time-delay neural networks (TDNNs). Zatorre-Navarro et al demonstrate mixed mode neuron architecture for sensor conditioning [88]. It uses an adaptive processor that consists of a mixed four-quadrant multiplier and a current conveyor that performs the nonlinearity.…”

Section: Hybrid Neural Hardware Implementationsmentioning

confidence: 99%

Evolvable Block-Based Neural Network Design for Applications in Dynamic Environments

Merchant

Peterson

2010

VLSI Design

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Dedicated hardware implementations of artificial neural networks promise to provide faster, lower-power operation when compared to software implementations executing on microprocessors, but rarely do these implementations have the flexibility to adapt and train online under dynamic conditions. A typical design process for artificial neural networks involves offline training using software simulations and synthesis and hardware implementation of the obtained network offline. This paper presents a design of block-based neural networks (BbNNs) on FPGAs capable of dynamic adaptation and online training. Specifically the network structure and the internal parameters, the two pieces of the multiparametric evolution of the BbNNs, can be adapted intrinsically, in-field under the control of the training algorithm. This ability enables deployment of the platform in dynamic environments, thereby significantly expanding the range of target applications, deployment lifetimes, and system reliability. The potential and functionality of the platform are demonstrated using several case studies.

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Analysis and Simulation of a Mixed-Mode Neuron Architecture for Sensor Conditioning

Cited by 17 publications

References 5 publications

Fusion of Fully Integrated Analog Machine Learning Classifier with Electronic Medical Records for Real-Time Prediction of Sepsis Onset

Fusion of Fully Integrated Analog Machine Learning Classifier with Electronic Medical Records for Real-Time Prediction of Sepsis Onset

Microelectronic CMOS Implementation of a Machine Learning Technique for Sensor Calibration

Evolvable Block-Based Neural Network Design for Applications in Dynamic Environments

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