Analysis for the Minimization of Leakage and Common Mode Currents in Cascaded Half-Bridge PV Fed Multilevel Inverter

Sonti, Venu; Dhara, Sumon; Kukade, Piyusha; Jain, Sachin; Agarwal, Vivek

doi:10.1109/jestpe.2018.2887304

Cited by 27 publications

(24 citation statements)

References 25 publications

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“…The size of the capacitors used for proposed BDIMLI is reduced by ∼60-100 times as compared with the other SCMLI counterparts. Topology presented in [9] requires less number of switches, but requires more number of sources and also lack of boosting capability. Table 4, it can be noticed that the proposed BDIMLI with high boost factor has reduced the count of switches as well as capacitors when compared with the other topologies presented.…”

Section: Component Count and Boost-factormentioning

confidence: 99%

“…The size of the capacitors used for proposed BDIMLI is reduced by ∼60–100 times as compared with the other SCMLI counterparts. Topology presented in [9] requires less number of switches, but requires more number of sources and also lack of boosting capability.…”

Section: Comparison With Existing Topologiesmentioning

confidence: 99%

“…A few MLI topologies are reported with reduced switch count and voltage sources [6][7][8][9][10][11] to improve compactness and efficiency. New pulse-width modulation (PWM) techniques [9] are presented to maintain constant CMV and reduce leakage currents in cascaded half-bridge MLI topologies. Also, fault-tolerant methods [10] are incorporated for reduced switch count SCMLI (RSCMLI).…”

Section: Introductionmentioning

confidence: 99%

“…Hence the size of the capacitor is a function of frequency and load resistance. Modified H-bridge based SCMLI topologies similar to [9] are reported to further reduce the switch count. These SCMLI topologies provide high modularity and reliability, but the absence of the charging path and elongated discharging time intervals may lead to adverse drooping of capacitor voltage.…”

Section: Introductionmentioning

confidence: 99%

“…Thus, it leads to increased cost and reduced efficiency. A few MLI topologies are reported with reduced switch count and voltage sources [6–11] to improve compactness and efficiency. New pulse‐width modulation (PWM) techniques [9] are presented to maintain constant CMV and reduce leakage currents in cascaded half‐bridge MLI topologies.…”

Section: Introductionmentioning

confidence: 99%

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Single‐phase boost DC‐link integrated cascaded multilevel inverter for PV applications

Babu

Narasimharaju

2020

IET Power Electronics

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This study presents a new boost DC-link integrated multilevel inverter (BDIMLI) topology for single-phase stand-alone photovoltaic applications. The BDIMLI is realised by the integration of two two-level boost DC-link converters (TBDCs) with a hybrid H-bridge inverter using symmetrical voltage sources. Conventional cascaded multilevel inverters require a large number of isolated DC source and circuit components. On the other side, switched capacitor multilevel inverter topologies require less number of sources and components, but need bulky capacitors. The proposed TBDC units charge the capacitors to the desired voltage with the high switching frequency, hence require less capacitance and component count. The proposed topology with proper selection of capacitor voltage levels can produce 9-, 11-and 13-level outputs without altering any circuit components. Besides, the proposed topology produces low-frequency common-mode voltage. The comprehensive analysis of BDIMLI in comparison with recent multilevel inverter topologies is presented. An experimental prototype of BDIMLI is built and its dynamic behaviour with different load conditions is presented for both 9-and 13-level operations.

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Section: Component Count and Boost-factormentioning

confidence: 99%

Section: Comparison With Existing Topologiesmentioning

confidence: 99%