Analysis of Circulating Harmonic Currents in Paralleled Three Level ANPC Inverters using SVM

Niu, Jiahao; Chen, Ruirui; Zhang, Zheyu; Gui, Handong; Wang, Fred; Tolbert, Leon M.; Blalock, Benjamin J.; Costinett, Daniel; Choi, Benjamin B.

doi:10.1109/apec.2019.8722068

Cited by 4 publications

(3 citation statements)

References 12 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…To acquire approximate results in the experiment and simulation, we chose the same switching device 10-FZ12NMA080SH01 from Vincotech to operate the simulation. The datasheet of the switching device is shown on the website from Vincotech [30].…”

Section: B Power Lossmentioning

confidence: 99%

An Improved Modulation Method for Parallel Three-Level Rectifiers With Circulating Current Mitigation

Li¹,

Zhang

Xiao³

et al. 2023

IEEE Access

View full text Add to dashboard Cite

show abstract

Section: B Power Lossmentioning

confidence: 99%

An Improved Modulation Method for Parallel Three-Level Rectifiers With Circulating Current Mitigation

Li¹,

Zhang

Xiao³

et al. 2023

IEEE Access

View full text Add to dashboard Cite

show abstract

“…The ZSCC between these paralleled converters is produced by the differences in filter inductors, unequal current measurements, and dead times [4,5]. Unfortunately, the ZSCC results in low-frequency harmonic components in the ac side currents, especially the third harmonic and its multiples, which increases the distortion and switching losses, reduces the efficiency and degrades the overall performance of the parallel systems [6][7][8][9].…”

Section: Introductionmentioning

confidence: 99%

Proportional Integral Quasi Resonant Controller for Zero-Sequence Circulating Current and Ripples Suppression in Parallel Three-Phase PWM Rectifiers

CHEBABHI,

HUSIN,

BARKAT

et al. 2023

RRST-EE

View full text Add to dashboard Cite

Parallel three-phase pulse with modulation (PWM) rectifiers with common sc and ac buses are widely used in power systems due to their many advantages such as flexibility, sinusoidal grid currents, lower switching frequency, and good reliability. However, this topology suffers from zero-sequence circulating current (ZSCC) generated by numerous reasons including filters inductors unbalanced, unequal dead time, and losses of synchronism between the control of each rectifier, which will distort the ac-side currents and increase power losses. This paper proposes both an adjusted space vector pulse width modulated (ASVPWM) method and proportional integral quasi resonant controller (PIQRC) method not only to force the ZSCC to be zero but also to reduce its ripples, which results in low frequency harmonic components in the ac side currents. This twofold objective can be achieved by adjusting the zero-vector duty ratios of ASVPWM to suppress the ZSCC and by using PIQRC to mitigate its predominant harmonics. Finally, the superiority and efficiency of the proposed control method in terms of ZSCC suppression and current ripple reduction are verified through comparative analysis with the conventional ZSCC-PI controller.

show abstract

“…Therefore, various studies have investigated dead-time compensation, such as extracting and compensating harmonics generated by dead-time or adjusting the effective application time according to the current direction [3,4]. The dead-time compensation in the three-level neutral point clamped (NPC) inverter is also compensated by analyzing the dead-time effect similar to the dead-time compensation used in the two-level inverter [5][6][7][8][9][10].…”

Section: Introductionmentioning

confidence: 99%

Independent Upper- and Lower-Arm Switching Scheme Based on Reference Current Polarity for Three-Level NPC Inverters

Ahn¹,

Oh²,

et al. 2021

Energies

View full text Add to dashboard Cite

This study presents a novel switching scheme for three-level neutral point clamped (NPC) inverters. The proposed switching method independently drives the upper- and lower-arm elements of the inverter based on the polarity information of the reference current. The proposed switching scheme does not require the inclusion of dead-time for each switching, except when the current polarity changes. Therefore, unlike the conventional inverter switching method, dead-time compensation is not needed, and the possibility of an arm-short accident is prevented. In this study, a switching procedure is detailed, and the operation mode analysis of the proposed switching scheme is presented. The effectiveness of the proposed switching method is verified experimentally by application to a grid-connected inverter that requires inverter current control.

show abstract

Analysis of Circulating Harmonic Currents in Paralleled Three Level ANPC Inverters using SVM

Cited by 4 publications

References 12 publications

An Improved Modulation Method for Parallel Three-Level Rectifiers With Circulating Current Mitigation

An Improved Modulation Method for Parallel Three-Level Rectifiers With Circulating Current Mitigation

Proportional Integral Quasi Resonant Controller for Zero-Sequence Circulating Current and Ripples Suppression in Parallel Three-Phase PWM Rectifiers

Independent Upper- and Lower-Arm Switching Scheme Based on Reference Current Polarity for Three-Level NPC Inverters

Contact Info

Product

Resources

About