Analysis of conditional resource sharing using a guard-based control representation

Abstract

Optimkation of hardware resources for conditional data-jiow graph behavior is particularly important when conditional behavior occurs in cyclic loops and " i z ation of throughput is desired. In this paper, an exact and efficient conditional resource sharing analysis using a guardbased control representation is presented. The analysis is transparent to a scheduler implementation. The proposed technique systematically handles complex conditional resource sharing for cases when folded (software pipelined) loops include conditional behavior within the loop body.Resource constraints play a crucial role in high-level synthesis of digital systems. Conditional resource sharing enhances resource usage by enabling simultaneous operations on different control paths to share physical resources. For example, operations belonging to "then" and "else" branches of an if-then-else statement are mutually exclusive when the choice of branch to execute is made prior to the execution of the branches. However, it has been shown [ll that superior scheduling results are possible if operations belonging to branch arcs are executed before the branching decision is made (speculative execution). In this case, static exclusivity analysis @erformed before scheduling) is not sufficient for optimal use of resources.A recent approach [Z] successfully detects a static pairwise mutual exclusiveness. In tree scheduling [3], a tree representation allows code motion and sub-trees induced by a branch can share resources. CVLS [ 11 uses condition vectors [4] to dynamically track exclusiveness of pre-executed operations. However, a case was reported wherein condition vector analysis can lead to an erroneous conclusion on mutual exclusion between the operations [5]. The representation from [5] handles nested if-then-else structures correctly, but is not applicable to some other forms of conditional behavior (e.g. gotu). These representations are all restricted to conditional tree structures. Parallel trees are addressed in [ 11, but the trees are either scheduled sequentially or tree duplication is performed. Most importantly, * Supported in part by a fellowship donation from Mentor Gra~hcs Corp.1063-640495 $4.00 0 1995 IEEE Forrest Brewer and Computer Engineering Santa Barbara, CA, U.S.A. none of these approaches discusses conditional resource sharing in cyclic controVdata flow graphs (CDFGs) with loop pipelining. Numerous techniques for cyclic data-flow graph (DFG) optimizations have been proposed, ranging from heuristics [61[71[8] to ILP methods [9] [ 101. However, none of them discusses cases in which conditional behavior occurs within the loop body. Semantics-preserving techniques and the BFSM-based approaches are applicable to cyclic CDFGs, but they either lack a formal treatment of conditional resource sharing [11][12] or introduce an excessive number of 0/1 variables to model resource and exclusivity constraints 1131. Recently, rotation scheduling [61 has been extended to pipelining of CDFGs [14]. This technique is based on a condition j a g rep...

Hierarchical conditional dependency graphs as a unifying design representation in the CODESIS high-level synthesis system

“…Both speculative execution and conditional resource sharing are combined in a uniform and consistent framework similarly to dynamic CV's of [3] and guards in [4], [5]. Even more, it does not suffer from effects of syntactic variance at both the mutual exclusiveness detection and scheduling levels, as CDFG or CFG based approaches do.…”

“…Control representations based on BDD's have already been used in previous work ( [15], [4], [5]). The originality of the GH lies on the hierarchy construction and not at the use of BDD's which are simply used for their efficiency.…”

“…Guards (named H i ) are a special type of nodes (shown as rectangles) and represent boolean conditions that control the execution of operations and the assignment of values to variables. They have also been used as a formal control model in [4], [5] using a CDFG representation.…”

“…Several better adapted heuristics were proposed ( [1], [2], [3], [4], [5], [6]). The quality of their results depends heavily on the ability to exploit conditional resource sharing ( [2], [4], [6], [7]) and speculative execution ( [3], [5], [16], [17]) possibilities as well as shorten path lengths using node duplication techniques [3].…”

Loop shifting and compaction for the high-level synthesis of designs with complex control flow

“…Lakshminarayana et al [3] describe how operations from successive loop iterations are speculatively executed. Radivojevic and Brewer [19] extend the loop folding technique for CDFGs. However, these last two approaches do not discuss how mis-predicted speculative execution is corrected.…”