Analysis of Current–Voltage Measurements on Long-Wavelength HgCdTe Photodiodes Fabricated on Si Composite Substrates

Abstract

We have performed a detailed study of dark current versus voltage to understand existing limitations in dark current and address the nonuniformity of dark current in devices fabricated on HgCdTe grown on silicon substrates. One interesting observation is that trap-assisted tunneling, g-r currents, are not found close to zero bias in certain devices. Devices from the low end of the R 0 A distribution show heavy shunting paths close to zero bias. We believe that these shunting paths may be the limiting cause of tail distributions in fabricated focal plane array tail distributions. Possible causes for these shunting paths are surface charges associated with dislocation cores and impurity gettering at dislocation cores. The measured non-anti-reflection (AR)-coated quantum efficiency (QE) was 0.576 at 78 K and displays the classical response versus wavelength. The measured QE on isolated single devices is consistent with the 256 9 256 focal-plane array mean QE. Obtained average dark currents are on the order of mid 10 À5 A cm -2 , which is one order of magnitude higher than dark currents obtained from arrays on latticematched substrates. On average, arrays on lattice-mismatched substrates show performance characteristics inferior to those of arrays fabricated on lattice-matched substrates. This inferior performance is due to array pixel operability, as can be seen from the tail of the distribution and the average dark currents, which are one order of magnitude higher than those obtained on lattice-matched substrates.

The Distribution Tail of LWIR HgCdTe-on-Si FPAs: a Hypothetical Physical Mechanism

“…12 Poorly performing HgCdTe/Si diodes (processed by ion implantation) due to shunt leakage currents have been found in Ref. 13. Tunneling components to the HgCdTe/Si I-V curve may be generated by the traps existing in the depletion region introduced by impurities traveling through the pipes.…”

Characterization of Dislocations in (112)B HgCdTe/CdTe/Si

“…19 I-V measurements from an array of 25 HgCdTe/Si test structure diodes were analyzed. The diodes with the highest values of R 0 A had diffusion-limited reverse-bias characteristics.…”

Feasibility of Localized Substrate Thinning for Reduced Dislocation Density in CdTe/Si Heterostructures

“…These dislocations reduce detector operability through the generation of shunt currents at electrical junctions in the device layer. 7 Ongoing studies suggest that discrete impurities, defect clustering, and other factors are also important, but will likely work in concert with TDs to cause inoperable pixels in detector arrays. [8][9][10][11] It is therefore reasonable to expect better overall detector performance for material with a lower TD density.…”