Analysis of degradation mechanism in polycrystalline silicon thin-film transistors under dynamic off-state stress with fast transition time

Abstract

This study represents the investigation into the degradation of polycrystalline silicon (poly-Si) thin-film transistors (TFTs) under dynamic off-state stress, with a focus on transition times as rapid as 1 nanosecond (ns). The study found that dynamic off-state stress with larger amplitude leads to more severe device degradation. Unlike previous studies, both the rising time (tr) and falling time (tf) of the pulse significantly influence the hot carrier (HC) degradation in the poly-Si TFTs. The on-state current degradation rate (ΔIon) after 104 s stress dramatically increases from 11.8% to 80.8% when tr decreases from 500 ns to 1 ns. When tf decreases from 500 ns to 1 ns, ΔIon also dramatically increases from 22.9% to 69.2%. Combined with transient simulations, the source of the carrier for HC degradation is clarified and consequently, a non-equilibrium PN junction degradation model modulated by accumulated electrons is developed.