Analysis of Doherty Power Amplifier Matching Assisted by Physics-Based Device Modelling

Abstract

The Doherty Power Amplifier represents one of the most promising solutions for the design of high-efficiency power stages. In the widely adopted ABC scheme, the Doherty Amplifier design critically depends on the accuracy of the device model in different operating conditions, ranging from class AB to class C. For the class C case, library models are often inaccurate, while experimental characterization is difficult since it must be carried out in large signal conditions and with varying gate bias. In this paper, we propose an alternative approach, based on physics-based Technological CAD (TCAD) simulations of the complete Doherty amplifier along with the analysis of its individual MAIN (class AB) and AUXILIARY (class C) stages. TCAD simulations seamlessly provide an accurate modelling of the device behavior in all operation classes, including the device turn-on and the nonlinear capacitances, and easily account for the cross-loading effects of the MAIN and AUXILIARY devices through the output network and the effect of the device feedback (gate-drain) capacitance on the input matching. Analyzing a GaAs Doherty stage at 12 GHz, we show that the input phase of the auxiliary stage can be exploited for the Doherty power amplifier optimization in terms of gain, linearity and efficiency, showing a 9 dB gain with less than 1 dB gain variation from back-off to peak power with a power-added efficiency exceeding 45% over a Doherty region extending to a more than 6 dB output power back-off.

A Broadband Three-Way Series Doherty Power Amplifier with Deep Power Back-Off Efficiency Enhancement for 5G Application

“…The Doherty power amplifier (DPA) is the most widely used architecture for improving the OBO efficiency of PAs due to its intrinsic linearity and low baseband overhead [8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23]. A DPA typically comprises a Main PA and an Auxiliary PA, with its OBO efficiency enhanced through active load modulation between these two sub-PAs.…”

“…In the series topology, the Auxiliary PA is connected in series with the Main PA through a λ/4 TL and a transformer, resulting in a load impedance of 2 × R opt . The parallel topology has been the prevalent choice for reported DPAs due to its ease of implementation [15][16][17][18][19]. Nevertheless, a two-way parallel DPA is restricted to providing efficiency improvements within 6 dB OBO, which is insufficient for the 5G NR waveform.…”