Analysis of efficiency optimization for PFM mode switching DC-DC boost regulator

Ahmed, Kashif; Islam, Md. Mazharul; Bari, Syed Mustafa Khelat; Islam, Didar; Hafiz, M.; Khosru, Quazi D. M.

doi:10.1109/icece.2008.4769199

Cited by 6 publications

(4 citation statements)

References 2 publications

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“…For design simplicity and low transistor count the PFM topology is a convenient choice. Some recent works are reported on this topology [1,2,15]. Specially as reported in [1], a converter is designed with adaptive ON-time (variable as a function on input voltage).…”

Section: Introductionmentioning

confidence: 99%

“…The price of increased peak current is however paid off by designing the power transistor channel on resistance to as low as possible with the minimized die area. This IC also employs the outcome of the mathematical analysis of efficiency optimization for PFM mode boost regulators performed in [15] where it is shown that single pulse operation has higher efficiency than multi pulse operation, this paper describes a newly designed and implemented high efficiency PFM mode boost regulator. The implemented Boost Regulator consumes only 5 lA of bias current in low load condition.…”

Section: Introductionmentioning

confidence: 99%

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Design and implementation of PFM mode high efficiency boost regulator

Ahmed

Bari

Islam³

et al. 2011

Analog Integr Circ Sig Process

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This paper presents the design and implementation of a low voltage DC-DC asynchronous boost regulator that works in PFM (pulse frequency modulation) mode. The booster is designed to supply low load condition of up to 20 mA with high efficiency. The total bias current of the chip is only 5 lA when operating with 1 mA load and the number goes to maximum of 18 lA with maximum load condition of 20 mA. The ultra low bias current enables the chip to maximize its efficiency in the entire load range. The chip features on-chip over current protection scheme and thermal protection scheme. The boost regulator is implemented in 0.5 lm BiCMOS process technology. The maximum measured efficiency of the fabricated chip is 86%.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Design and implementation of PFM mode high efficiency boost regulator

Ahmed

Bari

Islam³

et al. 2011

Analog Integr Circ Sig Process

Self Cite

View full text Add to dashboard Cite

show abstract

“…Pulse Frequency Modulation (PFM) is a nonlinear operation [8,16]. In PFM operation, a series of inductor current pulses are applied to the load and the output capacitor maintains the output voltage within the preset boundaries.…”

Section: Pfm Modulationmentioning

confidence: 99%

“…There are several types of PFM operation technique such as the single-pulse PFM, the multi-pulse PFM and the burst-mode PFM [8,16]. Burst-mode PFM is discussed in this report for its easy analysis and calculation.…”

Section: Pfm Modulationmentioning

confidence: 99%

Design of a power efficient output stage for dc-to-dc converters

Lao¹

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Pulse On/Off Modulation technique for switching converter

Zhong

Liu

et al. 2013

2013 International Conference on Communications, Circuits and Systems (ICCCAS)

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Pulse On/Off Modulation (POM) technique for switching converter is presented in this paper. POM controller generates the on/off modulation signal through comparing the output voltage with the reference voltage to realize the control of the converter. Buck converter was used as an example to illustrate the operation principle of POM control technique. The analysis and experimental results show that POM control has fast transient response and high light load efficiency.

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Analysis of efficiency optimization for PFM mode switching DC-DC boost regulator

Cited by 6 publications

References 2 publications

Design and implementation of PFM mode high efficiency boost regulator

Design and implementation of PFM mode high efficiency boost regulator

Design of a power efficient output stage for dc-to-dc converters

Pulse On/Off Modulation technique for switching converter

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