Analysis of Excess Carrier Concentration Control in Fast-Recovery High Power Bipolar Diodes at Low Current Densities

Abstract

The combination of emitter control with local lifetime tailoring by ion irradiation is experimentally analyzed in fast-recovery high power diodes. For this purpose, the carrier lifetime and excess carrier concentration profiles are measured and modeled within the low doped region of unirradiated and helium irradiated diodes under low current densities ͑Ͻ20 A/cm 2 ͒. The interest in working under these current conditions responds to the fact that the only recombination mechanism that modulates the steady-state carrier concentration is that of the multiphonon-assisted case ͑Shockley-Read-Hall model͒. This enables us to extract parameters for their modeling under arbitrary working conditions and to detect the influence of ion irradiation on the excess carrier distribution. For a better comprehension of the results, the excess carrier profile in the unirradiated diode is physically analyzed in detail by an analytical model. Afterward, physical simulations are also carried out, employing the experimental lifetime profiles as input parameters. As a result, a very good agreement between simulation predictions and experiments is observed, which is used to explain, by the support of analytical expressions, how the ion-irradiation process can improve the diode operation at low current densities during the late phase of the reverse recovery.The main difference between low and high power discrete bipolar diodes is the presence of a thick low N-doped layer ͑drift region͒ between highly P-and N-doped layers ͑emitters͒, which allows high power diodes reaching blocking voltages in the kilovolt range.During the blocking state ͑off-state͒, the drift region is gradually depleted until the full bus voltage is sustained by the PN − junction.In an on-state, carriers are injected from the highly doped layers into the drift region, finally reaching an excess carrier concentration much higher than that of the doping level ͑high injection condition͒. Such a physical effect changes the initial resistivity of this layer ͑conductivity modulation͒, highly reducing the power losses during the on-state.The transition from an on-state to an off-state ͑reverse recovery͒ requires a certain time ͑reverse recovery time͒ because the device drift region stores a large amount of excess carriers that should be removed. This removal time increases as the drift region is thicker. Additionally, it is required that for a safe reverse recovery process, the current flowing across the diode shows a smooth decay ͑soft behavior͒ without oscillations ͑snappy behavior͒, and the reverse current peak should be as small as possible. 1 Nowadays, two strategies are basically used to improve the reverse recovery response of power diodes: the emitter 2 and lifetime engineering. 3 There also exist sophisticated methods that utilize special PNP structures at the cathode side, e.g., field charge extraction 4 or controlled injection of back-side holes͒ 5 diodes. However, their implementation is more complicated and not without compromises. The emitter and lifetime engineerin...

Effects of Trap Levels on Reverse Recovery Surge of Silicon Power Diode

“…Table I shows a lists of the definition of symbols and parameters used for the calculation. The excess carrier distribution (p n ) in the depth direction (x) is expressed using the following equations: 1,25,26)…”

Fabrication, Morphological and Optoelectronic Properties of Antimony on Porous Silicon as MSM Photodetector

“…These values are higher than those reported earlier [13]. Life time dependence on Voc is exponential in broad terms [14]. It has been found that the carrier life time in the structure of porous heterojunction is always non-uniformly distributed and the difference over large area may be considerable.…”

Theoretical analysis of forward voltage and reverse recovery charge of silicon p–i–n diodes

“…The total current density J, the electron current density at the p/i interface J pe , and the hole current density at the i/n interface J nh are related as 27,28)…”