Analysis of High-Failure Mechanism Based on Gate-Controlled Device for Electro-Static Discharge Protection

Wang, Yang; Jin, Xiangliang; Peng, Yan; Luo, Jun; Zhong, Zeyu; Yang, Jun

doi:10.1109/access.2020.3042313

Cited by 1 publication

(1 citation statement)

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“…Harsh application environments and complex electronic systems bring great challenges to the design of on-chip electrostatic discharge (ESD) protection [1][2][3]. ESD protection of automotive communication ports usually requires high holding voltage (V h ) to avoid circuit latch-up and high failure current (I t2 ) to have good ESD robustness [4][5][6]. In practical electrostatic protection schemes, transient voltage suppressor (TVS) devices integrated on the chip are generally used.…”

Section: Introductionmentioning

confidence: 99%

Design of high voltage electrostatic protection device for CAN bus

Wang

Jin

et al. 2022

J. Phys.: Conf. Ser.

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The Dual-Direction Silicon Controlled Rectifier (DDSCR) device has dual-direction electrostatic protection function and strong current discharging ability, which is widely used in ESD on-chip protection. In this paper, a high performance symmetric high voltage Dual-Direction Silicon Controlled Rectifier with floating P+ (HVDDSCR_FP+) is designed for CAN bus under 0.18 μm BCD process. In order to predict and verify the ESD performance of the device, TCAD two-dimensional device simulation and Transmission Line Pulse (TLP) test system were used. The experimental results show that the HVDDSCR_FP + structure has not only symmetrical positive and reverse I-V curves, but also the characteristics of high holding voltage and high failure current. Compared with the traditional HVDDSCR, HVDDSCR_FP+, at 25V forward and reverse trigger voltages (Vt), has increased its holding voltage (Vh) from 12V to 20V, failure current (It2) from 5A to 35A. In the actual tape-out process, it is found that the width of the N-well has a great influence on the performance of the device. After analyzing the reason and improving it, the leakage current of the device is reduced from μA level to nA level.

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